查看ESP32 ULP的源代码

== Instrustion Opcode ==

<source lang=cpp>
#define OPCODE_WR_REG 1         /* write peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */
#define OPCODE_RD_REG 2         /* read peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */

#define OPCODE_I2C 3            /* read/write I2C (not implemented yet) */
#define OPCODE_DELAY 4          /* delay (nop) for a given number of cycles */
#define OPCODE_ADC 5            /* SAR ADC measurement (not implemented yet) */

#define OPCODE_ST 6             /* store indirect to RTC memory */
#define SUB_OPCODE_ST 4         /* Store 32 bits, 16 MSBs contain PC, 16 LSBs contain value from source register */

#define OPCODE_ALU 7            /* Arithmetic instructions */
#define SUB_OPCODE_ALU_REG 0    /* Arithmetic instruction, both source values are in register */
#define SUB_OPCODE_ALU_IMM 1    /* Arithmetic instruction, one source value is an immediate */
#define SUB_OPCODE_ALU_CNT 2    /* Arithmetic instruction between counter register and an immediate (not implemented yet)*/
#define ALU_SEL_ADD 0           /* Addition */
#define ALU_SEL_SUB 1           /* Subtraction */
#define ALU_SEL_AND 2           /* Logical AND */
#define ALU_SEL_OR  3           /* Logical OR */
#define ALU_SEL_MOV 4           /* Copy value (immediate to destination register or source register to destination register */
#define ALU_SEL_LSH 5           /* Shift left by given number of bits */
#define ALU_SEL_RSH 6           /* Shift right by given number of bits */

#define OPCODE_BRANCH 8         /* Branch instructions */
#define SUB_OPCODE_BX  0        /* Branch to absolute PC (immediate or in register) */
#define BX_JUMP_TYPE_DIRECT 0   /* Unconditional jump */
#define BX_JUMP_TYPE_ZERO 1     /* Branch if last ALU result is zero */
#define BX_JUMP_TYPE_OVF 2      /* Branch if last ALU operation caused and overflow */
#define SUB_OPCODE_B  1         /* Branch to a relative offset */
#define B_CMP_L 0               /* Branch if R0 is less than an immediate */
#define B_CMP_GE 1              /* Branch if R0 is greater than or equal to an immediate */

#define OPCODE_END 9            /* Stop executing the program (not implemented yet) */
#define SUB_OPCODE_END 0        /* Stop executing the program and optionally wake up the chip */
#define SUB_OPCODE_SLEEP 1      /* Stop executing the program and run it again after selected interval */

#define OPCODE_TSENS 10         /* Instruction: temperature sensor measurement (not implemented yet) */

#define OPCODE_HALT 11          /* Halt the coprocessor */
#define OPCODE_LD 13            /* Indirect load lower 16 bits from RTC memory */

#define OPCODE_MACRO 15         /* Not a real opcode. Used to identify labels and branches in the program */
#define SUB_OPCODE_MACRO_LABEL 0    /* Label macro */
#define SUB_OPCODE_MACRO_BRANCH 1   /* Branch macro */
</source>

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