ESP8266 RF INIT

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== Overview ==
 
== Overview ==
  
−
从 esp_iot_sdk_v1.4.0 版本起，开发者可以通过设置 esp_init_data_default.bin (0~127 byte) 的 114 byte  控制上电时 RF 初始化的⾏行为，具体如下：
+
从 ESP SDK v1.4.0 版本起，开发者可以通过设置 esp_init_data_default.bin (0~127 byte) 的 114 byte  控制上电时 RF 初始化的行为，具体如下：
  
−
* 114 byte 默认值为 0 ：RF 初始化仅做 VDD33 校准，耗时约 2 ms，初始电流最⼩小；
+
* 114 byte 默认值为 0 ：RF 初始化仅做 VDD33 校准，耗时约 2 ms，初始电流最小；
−
* 114 byte 若修改为 1 ：RF 初始化做 VDD33 和 TX power CAL，耗时约 18 ms，初始电流较⼩小；
+
* 114 byte 若修改为 1 ：RF 初始化做 VDD33 和 TX power CAL，耗时约 18 ms，初始电流较小；
−
* 114 byte 若修改为 2 ：RF 初始化仅做 VDD33 校准，耗时约 2 ms，初始电流最⼩小；与 0 值时一致；  
+
* 114 byte 若修改为 2 ：RF 初始化仅做 VDD33 校准，耗时约 2 ms，初始电流最小；与 0 值时一致；  
−
* 114 byte 若修改为 3 ：RF 初始化进⾏行全部 RF CAL，耗时约 200 ms，初始电流较
+
* 114 byte 若修改为 3 ：RF 初始化进行全部 RF CAL，耗时约 200 ms，初始电流较大
  
 
<br><br>
 
<br><br>
 +
 +
== Analysis ==
 +
 +
<source lang=bash>
 +
comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN rf_init_data_v1.4.0.bin.hex rf_init_data_v1.5.4.bin.hex
 +
--- rf_init_data_v1.4.0.bin.hex 2016-07-10 04:13:34.914718659 +0800
 +
+++ rf_init_data_v1.5.4.bin.hex 2016-07-10 04:14:01.778851871 +0800
 +
@@ -5,4 +5,4 @@
 +
0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 +
0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
-0000070: 03 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
+0000070: 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN rf_init_data_v1.4.0.bin.hex rf_init_data_v1.5.4.1.bin.hex
 +
--- rf_init_data_v1.4.0.bin.hex 2016-07-10 04:13:34.914718659 +0800
 +
+++ rf_init_data_v1.5.4.1.bin.hex 2016-07-10 04:14:13.278908897 +0800
 +
@@ -5,4 +5,4 @@
 +
0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 +
0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
-0000070: 03 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
+0000070: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
 +
comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN esp_init_data_default.bin.hex rf_init_data_v1.4.0.bin.hex
 +
--- esp_init_data_default.bin.hex 2016-07-10 04:20:40.140827241 +0800
 +
+++ rf_init_data_v1.4.0.bin.hex 2016-07-10 04:13:34.914718659 +0800
 +
@@ -5,4 +5,4 @@
 +
0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 +
0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
-0000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
+0000070: 03 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN esp_init_data_default.bin.hex esp_init_data_vdd33.bin.hex
 +
--- esp_init_data_default.bin.hex 2016-07-10 04:20:40.140827241 +0800
 +
+++ esp_init_data_vdd33.bin.hex 2016-07-10 04:20:50.256877404 +0800
 +
@@ -4,5 +4,5 @@
 +
0000030: 01 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00  ................
 +
0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 +
0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
-0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
+0000060: 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00  ................
 +
0000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN esp_init_data_default.bin.hex esp_init_data_vdd33.bin_40M.hex
 +
--- esp_init_data_default.bin.hex 2016-07-10 04:20:40.140827241 +0800
 +
+++ esp_init_data_vdd33.bin_40M.hex 2016-07-10 04:21:04.404947560 +0800
 +
@@ -1,8 +1,8 @@
 +
0000000: 05 00 04 02 05 05 05 02 05 00 04 05 05 04 05 05  ................
 +
0000010: 04 fe fd ff f0 f0 f0 e0 e0 e0 e1 0a ff ff f8 00  ................
 +
0000020: f8 f8 52 4e 4a 44 40 38 00 00 01 01 02 03 04 05  ..RNJD@8........
 +
-0000030: 01 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00  ................
 +
+0000030: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00  ................
 +
0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 +
0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
-0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
+0000060: 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00  ................
 +
0000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 +
</source>
 +
 +
<br><br>
 +
 +
== Reference ==
 +
 +
<pre>
 +
uint8_no uint8_name param lab_value description
 +
0 Reserved Reserved unsigned 0x5 do not change
 +
1 Reserved Reserved unsigned 0x0 do not change
 +
2 Reserved Reserved signed 4 do not change
 +
3 Reserved Reserved signed 2 do not change
 +
4 Reserved Reserved signed 5 do not change
 +
5 Reserved Reserved signed 5 do not change
 +
6 Reserved Reserved signed 5 do not change
 +
7 Reserved Reserved signed 2 do not change
 +
8 Reserved Reserved signed 5 do not change
 +
9 Reserved Reserved signed 0 do not change
 +
10 Reserved Reserved signed 4 do not change
 +
11 Reserved Reserved signed 5 do not change
 +
12 Reserved Reserved signed 5 do not change
 +
13 Reserved Reserved signed 4 do not change
 +
14 Reserved Reserved signed 5 do not change
 +
15 Reserved Reserved signed 5 do not change
 +
16 Reserved Reserved signed 4 do not change
 +
17 Reserved Reserved signed -2 do not change
 +
18 Reserved Reserved signed -3 do not change
 +
19 Reserved Reserved signed -1 do not change
 +
20 Reserved Reserved signed -16 do not change
 +
21 Reserved Reserved signed -16 do not change
 +
22 Reserved Reserved signed -16 do not change
 +
23 Reserved Reserved signed -32 do not change
 +
24 Reserved Reserved signed -32 do not change
 +
25 Reserved Reserved signed -32 do not change
 +
26 rx_param25 spur_freq_cfg unsigned 225 spur_freq=spur_freq_cfg/spur_freq_cfg_div
 +
27 rx_param26 spur_freq_cfg_div unsigned 10
 +
28 rx_param27 spur_freq_en_h unsigned 0 "each bit for 1 channel, 1 to select the spur_freq if in band, else 40"
 +
29 rx_param28 spur_freq_en_l unsigned 0
 +
30 Reserved Reserved signed 0xf8 do not change
 +
31 Reserved Reserved signed 0 do not change
 +
32 Reserved Reserved signed 0xf8 do not change
 +
33 Reserved Reserved signed 0xf8 do not change
 +
34 tx_param5 target_power_qdb_0 unsigned 82 82 means target power is 82/4=20.5dbm
 +
35 tx_param6 target_power_qdb_1 unsigned 78 78 means target power is 78/4=19.5dbm
 +
36 tx_param7 target_power_qdb_2 unsigned 74 74 means target power is 74/4=18.5dbm
 +
37 tx_param8 target_power_qdb_3 unsigned 68 68 means target power is 68/4=17dbm
 +
38 tx_param9 target_power_qdb_4 unsigned 64 64 means target power is 64/4=16dbm
 +
39 tx_param10 target_power_qdb_5 unsigned 56 56 means target power is 56/4=14dbm
 +
40 tx_param11 target_power_index_mcs0 unsigned 0 "target power index is 0, means target power is target_power_qdb_0 20.5dbm;    (1m,2m,5.5m,11m,6m,9m)"
 +
41 tx_param12 target_power_index_mcs1 unsigned 0 "target power index is 0, means target power is target_power_qdb_0 20.5dbm;    (12m)"
 +
42 tx_param13 target_power_index_mcs2 unsigned 1 "target power index is 1, means target power is target_power_qdb_1 19.5dbm;    (18m)"
 +
43 tx_param14 target_power_index_mcs3 unsigned 1 "target power index is 1, means target power is target_power_qdb_1 19.5dbm;    (24m)"
 +
44 tx_param15 target_power_index_mcs4 unsigned 2 "target power index is 2, means target power is target_power_qdb_2 18.5dbm;    (36m)"
 +
45 tx_param16 target_power_index_mcs5 unsigned 3 "target power index is 3, means target power is target_power_qdb_3 17dbm;        (48m)"
 +
46 tx_param17 target_power_index_mcs6 unsigned 4 "target power index is 4, means target power is target_power_qdb_4 16dbm;        (54m)"
 +
47 tx_param18 target_power_index_mcs7 unsigned 5 "target power index is 5, means target power is target_power_qdb_5 14dbm"
 +
48 soc_param0 crystal_26m_en unsigned 0
 +
 +
0: 40MHz
 +
1: 26MHz
 +
2: 24MHz
 +
 +
49 Reserved Reserved unsigned 0 do not change
 +
50 soc_param2 sdio_configure unsigned 0
 +
 +
0: Auto by pin strapping
 +
1: SDIO dataoutput is at negative edges (SDIO V1.1)
 +
2: SDIO dataoutput is at positive edges (SDIO V2.0)
 +
 +
51 soc_param3 bt_configure unsigned 0
 +
 +
0: None,no bluetooth
 +
1: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
 +
    MTMS -> BT_ACTIVE
 +
    MTCK  -> BT_PRIORITY
 +
    U0RXD -> ANT_SEL_BT
 +
2: None, have bluetooth
 +
3: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
 +
    MTMS -> BT_PRIORITY
 +
    MTCK  -> BT_ACTIVE
 +
    U0RXD -> ANT_SEL_BT
 +
 +
52 soc_param4 bt_protocol unsigned 0
 +
 +
0: WiFi-BT are not enabled. Antenna is for WiFi
 +
1: WiFi-BT are not enabled. Antenna is for BT
 +
2: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), independent ant
 +
3: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), independent ant
 +
4: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), share ant
 +
5: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), share ant
 +
 +
53 soc_param5 dual_ant_configure unsigned 0
 +
 +
0: None
 +
1: dual_ant (antenna diversity for WiFi-only): GPIO0 + U0RXD
 +
2: T/R switch for External PA/LNA:  GPIO0 is high and U0RXD is low during Tx
 +
3: T/R switch for External PA/LNA:  GPIO0 is low and U0RXD is high during Tx
 +
 +
54 Reserved Reserved unsigned 2 do not change
 +
55 soc_param7 share_xtal unsigned 0
 +
 +
This option is to share crystal clock for BT
 +
The state of Crystal during sleeping
 +
0: Off
 +
1: Forcely On
 +
2: Automatically On according to XPD_DCDC
 +
3: Automatically On according to GPIO2
 +
 +
56 Reserved Reserved unsigned 0 do not change
 +
57 Reserved Reserved unsigned 0 do not change
 +
58 Reserved Reserved unsigned 0 do not change
 +
59 Reserved Reserved unsigned 0
 +
60 Reserved Reserved unsigned 0
 +
61 Reserved Reserved unsigned 0
 +
62 Reserved Reserved unsigned 0
 +
63 Reserved Reserved unsigned 0
 +
64 rx_param29 spur_freq_cfg_2 unsigned 225 spur_freq_2=spur_freq_cfg_2/spur_freq_cfg_div_2
 +
65 rx_param30 spur_freq_cfg_div_2 unsigned 10
 +
66 rx_param31 spur_freq_en_h_2 unsigned 0 "each bit for 1 channel, and use [spur_freq_en, spur_freq_en_2] to select the spur's priority"
 +
67 rx_param32 spur_freq_en_l_2 unsigned 0
 +
68 rx_param33 spur_freq_cfg_msb unsigned 0
 +
69 rx_param34 spur_freq_cfg_2_msb unsigned 0
 +
70 rx_param35 spur_freq_cfg_3_low unsigned 0 spur_freq_3=((spur_freq_cfg_3_high<<8)+spur_freq_cfg_3_low)/10+2400
 +
71 rx_param36 spur_freq_cfg_3_high unsigned 0
 +
72 rx_param37 spur_freq_cfg_4_low unsigned 0 spur_freq_4=((spur_freq_cfg_4_high<<8)+spur_freq_cfg_4_low)/10+2400
 +
73 rx_param38 spur_freq_cfg_4_high unsigned 0
 +
74 Reserved Reserved unsigned 1 do not change
 +
75 Reserved Reserved unsigned 0x93 do not change
 +
76 Reserved Reserved unsigned 0x43 do not change
 +
77 Reserved Reserved unsigned 0x00 do not change
 +
78 Reserved Reserved unsigned 0 do not change
 +
79 Reserved Reserved unsigned 0 do not change
 +
80 Reserved Reserved unsigned 0 do not change
 +
81 Reserved Reserved unsigned 0 do not change
 +
82 Reserved Reserved unsigned 0 do not change
 +
83 Reserved Reserved unsigned 0 do not change
 +
84 Reserved Reserved unsigned 0 do not change
 +
85 Reserved Reserved unsigned 0 do not change
 +
86 Reserved Reserved unsigned 0 do not change
 +
87 Reserved Reserved unsigned 0 do not change
 +
88 Reserved Reserved unsigned 0 do not change
 +
89 Reserved Reserved unsigned 0 do not change
 +
90 Reserved Reserved unsigned 0 do not change
 +
91 Reserved Reserved unsigned 0 do not change
 +
92 Reserved Reserved unsigned 0 do not change
 +
93 tx_param24 low_power_en unsigned 0
 +
 +
0: disable low power mode
 +
1: enable low power mode
 +
 +
94 tx_param25 lp_rf_stg10 unsigned 0xf
 +
 +
the attenuation of RF gain stage 0 and 1,
 +
0xf: 0db,  0xe: -2.5db,  0xd: -6db,  0x9: -8.5db, 0xc: -11.5db,  0x8: -14db,  0x4: -17.5, 0x0: -23
 +
 +
 +
95 tx_param26 lp_bb_att_ext unsigned 0
 +
 +
the attenuation of BB gain,
 +
0: 0db,  1: -0.25db,  2: -0.5db,  3: -0.75db,  4: -1db,  5: -1.25db, 6: -1.5db, 7: -1.75db, 8: -2db  …….(max valve is 24(-6db))
 +
 +
 +
96 tx_param27 pwr_ind_11b_en unsigned 0
 +
 +
0: 11b power is same as mcs0 and 6m
 +
1: enable 11b power different with ofdm
 +
 +
 +
97 tx_param28 pwr_ind_11b_0 unsigned 0 "1m, 2m power index [0~5]"
 +
98 tx_param29 pwr_ind_11b_1 unsigned 0 "5.5m, 11m power index [0~5]"
 +
99 Reserved Reserved unsigned 0 do not change
 +
100 Reserved Reserved unsigned 0 do not change
 +
101 Reserved Reserved unsigned 0 do not change
 +
102 Reserved Reserved unsigned 0 do not change
 +
103 Reserved Reserved unsigned 0 do not change
 +
104 Reserved Reserved unsigned 0 do not change
 +
105 Reserved Reserved unsigned 0 do not change
 +
106 Reserved Reserved unsigned 0 do not change
 +
107 tx_param37 vdd33_const unsigned 0
 +
 +
the voltage of PA_VDD
 +
x=0xff: it can measure VDD33,
 +
18<=x<=36: use input voltage,  the value is voltage*10, 33 is 3.3V,  30 is 3.0V,
 +
x<18 or x>36: default voltage is 3.3V
 +
 +
 +
108 Reserved Reserved unsigned 0 do not change
 +
109 Reserved Reserved unsigned 0 do not change
 +
110 Reserved Reserved unsigned 0 do not change
 +
111 Reserved Reserved unsigned 0 do not change
 +
112 tx_param42 freq_correct_en unsigned 0
 +
 +
bit[0]:0->do not correct frequency offset , 1->correct frequency offset .
 +
bit[1]:0->bbpll is 168M, it can correct + and - frequency offset,  1->bbpll is 160M, it only can correct + frequency offset
 +
bit[2]:0->auto measure frequency offset and correct it, 1->use 113 byte force_freq_offset to correct frequency offset.
 +
0: do not correct frequency offset.
 +
1: auto measure frequency offset and correct it,  bbpll is 168M, it can correct + and - frequency offset.
 +
3: auto measure frequency offset and correct it,  bbpll is 160M, it only can correct + frequency offset.
 +
5: use 113 byte force_freq_offset to correct frequency offset, bbpll is 168M, it can correct + and - frequency offset.
 +
7: use 113 byte force_freq_offset to correct frequency offset, bbpll is 160M , it only can correct + frequency offset
 +
 +
 +
113 tx_param43 force_freq_offset unsigned 0 "signed, unit is 8khz"
 +
114 tx_param44 rf_cal_use_flash unsigned 0
 +
 +
0: RF init no RF CAL, using all RF CAL data in flash, it takes about 2ms for RF init
 +
1: RF init only do TX power control CAL, others using RF CAL data in flash , it takes about 20ms for RF init
 +
2: RF init no RF CAL, using all RF CAL data in flash, it takes about 2ms for RF init 
 +
3: RF init do all RF CAL, it takes about 200ms for RF init
 +
 +
 +
115 Reserved Reserved unsigned 0 do not change
 +
116 Reserved Reserved unsigned 0 do not change
 +
117 Reserved Reserved unsigned 0 do not change
 +
118 Reserved Reserved unsigned 0 do not change
 +
119 Reserved Reserved unsigned 0 do not change
 +
120 Reserved Reserved unsigned 0 do not change
 +
121 Reserved Reserved unsigned 0 do not change
 +
122 Reserved Reserved unsigned 0 do not change
 +
123 Reserved Reserved unsigned 0 do not change
 +
124 Reserved Reserved unsigned 0 do not change
 +
125 Reserved Reserved unsigned 0 do not change
 +
126 Reserved Reserved unsigned 0 do not change
 +
127 Reserved Reserved unsigned 0 do not change
 +
</pre>
 +
 
<br><br>
 
<br><br>
 
<br><br>
 
<br><br>

2016年7月10日 (日) 10:09的最后版本

[编辑] 1 Overview

从 ESP SDK v1.4.0 版本起，开发者可以通过设置 esp_init_data_default.bin (0~127 byte) 的 114 byte 控制上电时 RF 初始化的行为，具体如下：

  • 114 byte 默认值为 0 ：RF 初始化仅做 VDD33 校准，耗时约 2 ms，初始电流最小；
  • 114 byte 若修改为 1 ：RF 初始化做 VDD33 和 TX power CAL，耗时约 18 ms，初始电流较小；
  • 114 byte 若修改为 2 ：RF 初始化仅做 VDD33 校准，耗时约 2 ms，初始电流最小；与 0 值时一致；
  • 114 byte 若修改为 3 ：RF 初始化进行全部 RF CAL，耗时约 200 ms，初始电流较大



[编辑] 2 Analysis 

comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN rf_init_data_v1.4.0.bin.hex rf_init_data_v1.5.4.bin.hex 
--- rf_init_data_v1.4.0.bin.hex	2016-07-10 04:13:34.914718659 +0800
+++ rf_init_data_v1.5.4.bin.hex	2016-07-10 04:14:01.778851871 +0800
@@ -5,4 +5,4 @@
 0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
-0000070: 03 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+0000070: 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN rf_init_data_v1.4.0.bin.hex rf_init_data_v1.5.4.1.bin.hex 
--- rf_init_data_v1.4.0.bin.hex	2016-07-10 04:13:34.914718659 +0800
+++ rf_init_data_v1.5.4.1.bin.hex	2016-07-10 04:14:13.278908897 +0800
@@ -5,4 +5,4 @@
 0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
-0000070: 03 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+0000070: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00  ................

comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN esp_init_data_default.bin.hex rf_init_data_v1.4.0.bin.hex 
--- esp_init_data_default.bin.hex	2016-07-10 04:20:40.140827241 +0800
+++ rf_init_data_v1.4.0.bin.hex	2016-07-10 04:13:34.914718659 +0800
@@ -5,4 +5,4 @@
 0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
 0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
-0000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+0000070: 03 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN esp_init_data_default.bin.hex esp_init_data_vdd33.bin.hex 
--- esp_init_data_default.bin.hex	2016-07-10 04:20:40.140827241 +0800
+++ esp_init_data_vdd33.bin.hex	2016-07-10 04:20:50.256877404 +0800
@@ -4,5 +4,5 @@
 0000030: 01 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00  ................
 0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
-0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+0000060: 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00  ................
 0000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
comcat@jackslab:/work/xwifi/low-power/rfinit$ diff -uN esp_init_data_default.bin.hex esp_init_data_vdd33.bin_40M.hex 
--- esp_init_data_default.bin.hex	2016-07-10 04:20:40.140827241 +0800
+++ esp_init_data_vdd33.bin_40M.hex	2016-07-10 04:21:04.404947560 +0800
@@ -1,8 +1,8 @@
 0000000: 05 00 04 02 05 05 05 02 05 00 04 05 05 04 05 05  ................
 0000010: 04 fe fd ff f0 f0 f0 e0 e0 e0 e1 0a ff ff f8 00  ................
 0000020: f8 f8 52 4e 4a 44 40 38 00 00 01 01 02 03 04 05  ..RNJD@8........
-0000030: 01 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00  ................
+0000030: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00  ................
 0000040: e1 0a 00 00 00 00 00 00 00 00 01 93 43 00 00 00  ............C...
 0000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
-0000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+0000060: 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00  ................
 0000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................



[编辑] 3 Reference 

uint8_no	uint8_name	param		lab_value	description
0	Reserved	Reserved	unsigned	0x5	do not change
1	Reserved	Reserved	unsigned	0x0	do not change
2	Reserved	Reserved	signed	4	do not change
3	Reserved	Reserved	signed	2	do not change
4	Reserved	Reserved	signed	5	do not change
5	Reserved	Reserved	signed	5	do not change
6	Reserved	Reserved	signed	5	do not change
7	Reserved	Reserved	signed	2	do not change
8	Reserved	Reserved	signed	5	do not change
9	Reserved	Reserved	signed	0	do not change
10	Reserved	Reserved	signed	4	do not change
11	Reserved	Reserved	signed	5	do not change
12	Reserved	Reserved	signed	5	do not change
13	Reserved	Reserved	signed	4	do not change
14	Reserved	Reserved	signed	5	do not change
15	Reserved	Reserved	signed	5	do not change
16	Reserved	Reserved	signed	4	do not change
17	Reserved	Reserved	signed	-2	do not change
18	Reserved	Reserved	signed	-3	do not change
19	Reserved	Reserved	signed	-1	do not change
20	Reserved	Reserved	signed	-16	do not change
21	Reserved	Reserved	signed	-16	do not change
22	Reserved	Reserved	signed	-16	do not change
23	Reserved	Reserved	signed	-32	do not change
24	Reserved	Reserved	signed	-32	do not change
25	Reserved	Reserved	signed	-32	do not change
26	rx_param25	spur_freq_cfg	unsigned	225	spur_freq=spur_freq_cfg/spur_freq_cfg_div
27	rx_param26	spur_freq_cfg_div	unsigned	10	
28	rx_param27	spur_freq_en_h	unsigned	0	"each bit for 1 channel, 1 to select the spur_freq if in band, else 40"
29	rx_param28	spur_freq_en_l	unsigned	0	
30	Reserved	Reserved	signed	0xf8	do not change
31	Reserved	Reserved	signed	0	do not change
32	Reserved	Reserved	signed	0xf8	do not change
33	Reserved	Reserved	signed	0xf8	do not change
34	tx_param5	target_power_qdb_0	unsigned	82	82 means target power is 82/4=20.5dbm
35	tx_param6	target_power_qdb_1	unsigned	78	78 means target power is 78/4=19.5dbm
36	tx_param7	target_power_qdb_2	unsigned	74	74 means target power is 74/4=18.5dbm
37	tx_param8	target_power_qdb_3	unsigned	68	68 means target power is 68/4=17dbm
38	tx_param9	target_power_qdb_4	unsigned	64	64 means target power is 64/4=16dbm
39	tx_param10	target_power_qdb_5	unsigned	56	56 means target power is 56/4=14dbm
40	tx_param11	target_power_index_mcs0	unsigned	0	"target power index is 0, means target power is target_power_qdb_0 20.5dbm;     (1m,2m,5.5m,11m,6m,9m)"
41	tx_param12	target_power_index_mcs1	unsigned	0	"target power index is 0, means target power is target_power_qdb_0 20.5dbm;     (12m)"
42	tx_param13	target_power_index_mcs2	unsigned	1	"target power index is 1, means target power is target_power_qdb_1 19.5dbm;     (18m)"
43	tx_param14	target_power_index_mcs3	unsigned	1	"target power index is 1, means target power is target_power_qdb_1 19.5dbm;     (24m)"
44	tx_param15	target_power_index_mcs4	unsigned	2	"target power index is 2, means target power is target_power_qdb_2 18.5dbm;     (36m)"
45	tx_param16	target_power_index_mcs5	unsigned	3	"target power index is 3, means target power is target_power_qdb_3 17dbm;        (48m)"
46	tx_param17	target_power_index_mcs6	unsigned	4	"target power index is 4, means target power is target_power_qdb_4 16dbm;        (54m)"
47	tx_param18	target_power_index_mcs7	unsigned	5	"target power index is 5, means target power is target_power_qdb_5 14dbm"
48	soc_param0	crystal_26m_en	unsigned	0	

0: 40MHz
1: 26MHz
2: 24MHz

49	Reserved	Reserved	unsigned	0	do not change
50	soc_param2	sdio_configure	unsigned	0	

0: Auto by pin strapping
1: SDIO dataoutput is at negative edges (SDIO V1.1)
2: SDIO dataoutput is at positive edges (SDIO V2.0)

51	soc_param3	bt_configure	unsigned	0	

0: None,no bluetooth
1: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
    MTMS -> BT_ACTIVE
    MTCK  -> BT_PRIORITY
    U0RXD -> ANT_SEL_BT
2: None, have bluetooth
3: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
    MTMS -> BT_PRIORITY
    MTCK  -> BT_ACTIVE
    U0RXD -> ANT_SEL_BT

52	soc_param4	bt_protocol	unsigned	0	

0: WiFi-BT are not enabled. Antenna is for WiFi
1: WiFi-BT are not enabled. Antenna is for BT
2: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), independent ant
3: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), independent ant
4: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), share ant
5: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), share ant

53	soc_param5	dual_ant_configure	unsigned	0	

0: None
1: dual_ant (antenna diversity for WiFi-only): GPIO0 + U0RXD
2: T/R switch for External PA/LNA:  GPIO0 is high and U0RXD is low during Tx
3: T/R switch for External PA/LNA:  GPIO0 is low and U0RXD is high during Tx

54	Reserved	Reserved	unsigned	2	do not change
55	soc_param7	share_xtal	unsigned	0	

This option is to share crystal clock for BT
The state of Crystal during sleeping
0: Off
1: Forcely On
2: Automatically On according to XPD_DCDC
3: Automatically On according to GPIO2

56	Reserved	Reserved	unsigned	0	do not change
57	Reserved	Reserved	unsigned	0	do not change
58	Reserved	Reserved	unsigned	0	do not change
59	Reserved	Reserved	unsigned	0	
60	Reserved	Reserved	unsigned	0	
61	Reserved	Reserved	unsigned	0	
62	Reserved	Reserved	unsigned	0	
63	Reserved	Reserved	unsigned	0	
64	rx_param29	spur_freq_cfg_2	unsigned	225	spur_freq_2=spur_freq_cfg_2/spur_freq_cfg_div_2
65	rx_param30	spur_freq_cfg_div_2	unsigned	10	
66	rx_param31	spur_freq_en_h_2	unsigned	0	"each bit for 1 channel, and use [spur_freq_en, spur_freq_en_2] to select the spur's priority"
67	rx_param32	spur_freq_en_l_2	unsigned	0	
68	rx_param33	spur_freq_cfg_msb	unsigned	0	
69	rx_param34	spur_freq_cfg_2_msb	unsigned	0	
70	rx_param35	spur_freq_cfg_3_low	unsigned	0	spur_freq_3=((spur_freq_cfg_3_high<<8)+spur_freq_cfg_3_low)/10+2400
71	rx_param36	spur_freq_cfg_3_high	unsigned	0	
72	rx_param37	spur_freq_cfg_4_low	unsigned	0	spur_freq_4=((spur_freq_cfg_4_high<<8)+spur_freq_cfg_4_low)/10+2400
73	rx_param38	spur_freq_cfg_4_high	unsigned	0	
74	Reserved	Reserved	unsigned	1	do not change
75	Reserved	Reserved	unsigned	0x93	do not change
76	Reserved	Reserved	unsigned	0x43	do not change
77	Reserved	Reserved	unsigned	0x00	do not change
78	Reserved	Reserved	unsigned	0	do not change
79	Reserved	Reserved	unsigned	0	do not change
80	Reserved	Reserved	unsigned	0	do not change
81	Reserved	Reserved	unsigned	0	do not change
82	Reserved	Reserved	unsigned	0	do not change
83	Reserved	Reserved	unsigned	0	do not change
84	Reserved	Reserved	unsigned	0	do not change
85	Reserved	Reserved	unsigned	0	do not change
86	Reserved	Reserved	unsigned	0	do not change
87	Reserved	Reserved	unsigned	0	do not change
88	Reserved	Reserved	unsigned	0	do not change
89	Reserved	Reserved	unsigned	0	do not change
90	Reserved	Reserved	unsigned	0	do not change
91	Reserved	Reserved	unsigned	0	do not change
92	Reserved	Reserved	unsigned	0	do not change
93	tx_param24	low_power_en	unsigned	0	

0: disable low power mode
1: enable low power mode

94	tx_param25	lp_rf_stg10	unsigned	0xf	

the attenuation of RF gain stage 0 and 1,
0xf: 0db,  0xe: -2.5db,  0xd: -6db,  0x9: -8.5db, 0xc: -11.5db,  0x8: -14db,  0x4: -17.5, 0x0: -23


95	tx_param26	lp_bb_att_ext	unsigned	0	

the attenuation of BB gain,
0: 0db,  1: -0.25db,  2: -0.5db,  3: -0.75db,  4: -1db,   5: -1.25db, 6: -1.5db, 7: -1.75db, 8: -2db  …….(max valve is 24(-6db))


96	tx_param27	pwr_ind_11b_en	unsigned	0	

0: 11b power is same as mcs0 and 6m
1: enable 11b power different with ofdm


97	tx_param28	pwr_ind_11b_0	unsigned	0	"1m, 2m power index [0~5]"
98	tx_param29	pwr_ind_11b_1	unsigned	0	"5.5m, 11m power index [0~5]"
99	Reserved	Reserved	unsigned	0	do not change
100	Reserved	Reserved	unsigned	0	do not change
101	Reserved	Reserved	unsigned	0	do not change
102	Reserved	Reserved	unsigned	0	do not change
103	Reserved	Reserved	unsigned	0	do not change
104	Reserved	Reserved	unsigned	0	do not change
105	Reserved	Reserved	unsigned	0	do not change
106	Reserved	Reserved	unsigned	0	do not change
107	tx_param37	vdd33_const	unsigned	0	

the voltage of PA_VDD
x=0xff: it can measure VDD33,
18<=x<=36: use input voltage,  the value is voltage*10, 33 is 3.3V,   30 is 3.0V,
x<18 or x>36: default voltage is 3.3V


108	Reserved	Reserved	unsigned	0	do not change
109	Reserved	Reserved	unsigned	0	do not change
110	Reserved	Reserved	unsigned	0	do not change
111	Reserved	Reserved	unsigned	0	do not change
112	tx_param42	freq_correct_en	unsigned	0	

bit[0]:0->do not correct frequency offset , 1->correct frequency offset .
bit[1]:0->bbpll is 168M, it can correct + and - frequency offset,  1->bbpll is 160M, it only can correct + frequency offset
bit[2]:0->auto measure frequency offset and correct it, 1->use 113 byte force_freq_offset to correct frequency offset. 
0: do not correct frequency offset.
1: auto measure frequency offset and correct it,  bbpll is 168M, it can correct + and - frequency offset.
3: auto measure frequency offset and correct it,  bbpll is 160M, it only can correct + frequency offset.
5: use 113 byte force_freq_offset to correct frequency offset, bbpll is 168M, it can correct + and - frequency offset.
7: use 113 byte force_freq_offset to correct frequency offset, bbpll is 160M , it only can correct + frequency offset


113	tx_param43	force_freq_offset	unsigned	0	"signed, unit is 8khz"
114	tx_param44	rf_cal_use_flash	unsigned	0	

0: RF init no RF CAL, using all RF CAL data in flash, it takes about 2ms for RF init 
1: RF init only do TX power control CAL, others using RF CAL data in flash , it takes about 20ms for RF init 
2: RF init no RF CAL, using all RF CAL data in flash, it takes about 2ms for RF init  
3: RF init do all RF CAL, it takes about 200ms for RF init


115	Reserved	Reserved	unsigned	0	do not change
116	Reserved	Reserved	unsigned	0	do not change
117	Reserved	Reserved	unsigned	0	do not change
118	Reserved	Reserved	unsigned	0	do not change
119	Reserved	Reserved	unsigned	0	do not change
120	Reserved	Reserved	unsigned	0	do not change
121	Reserved	Reserved	unsigned	0	do not change
122	Reserved	Reserved	unsigned	0	do not change
123	Reserved	Reserved	unsigned	0	do not change
124	Reserved	Reserved	unsigned	0	do not change
125	Reserved	Reserved	unsigned	0	do not change
126	Reserved	Reserved	unsigned	0	do not change
127	Reserved	Reserved	unsigned	0	do not change























来自“http://wiki.jackslab.org/index.php?title=ESP8266_RF_INIT&oldid=5895”
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