ASR650x

2020年6月5日 (五) 15:40的版本

1 ASR6505

STM8L152
- Up to 16MHz
- 4KB RAM (0x0000 ~ 0x0FFF, including 513B stack)
- 2KB EEPROM (0x1000 ~ 0x1FFF)
- 64KB Flash (0x8080 ~ 0x1 7FFF)
- SPI x1, I2C x1, UART x2
- GPIO x30, ADC x3, SWIM x1
85mA @22dBm, 50mA@17dBm, 40mA@14dBm

SX1262
2.4V to 3.7V (3.9V max) Power supply
Sleep mode: 1uA without RTC, 1.6uA with RTC
QFN68, 8x8mm

2 ASR6501

2.1 Overview

PSoC 4100S Plus MCU
- 48 MHz ARM Cortex-M0+ Core
- up to 128kbytes of Flash memory and 16Kbytes of SRAM
- 6x configurable GPIOs, 1xI2C, 1xUART, 1xSWD
- 8-Channel DMA engine
- 12-bit 1Msps SAR ADC with differential and single-ended
- 32.768kHz External Watch Crystal Oscillator
- 4-33MHz External Crystal Oscillator for MCU (Optional)
- 32MHz External Crystal Oscillator for LoRa Radio
- Internal High frequency (48MHz) RC oscillator
- Internal Low frequency (40kHz) RC oscillator
- Internal PLL to generate 48MHz clock
- 1.71V to 5.5V Power supply
- Deep Sleep mode with 2.5uA
SX1262
2.4V to 3.7V (3.9V max) Power supply
Sleep mode: 2.7uA with RTC; 2uA without RTC
QFN48 6x6mm

2.2 RF-AL42UH

* P1  GND 电源地
* P2  VDD, 电源输入，范围 2.8V ~ 3.6V DC
* P3  ADC_IN，ADC输入脚，程序未启用，悬空
* P4  GPIO，MCU GPIO，悬空
* P5  AUX，MCU GPIO，悬空
* P6  SETA，MCU GPIO，悬空
* P7  RXD，UART 的 RX 信号
* P8  TXD，UART 的 TX 信号
* P9  SWD，SWD DATA引脚

* P10  SCLK，SWD CLK引脚
* P11  I2C_SCL，I2C引脚，程序未启用，悬空
* P12  I2C_SDA，I2C引脚，程序未启用，悬空
* P13  SETB，MCU GPIO，悬空
* P14  CTS，悬空
* P15  RTS，悬空
* P16  RESET，复位引脚，低电平有效。无须拉高（内部已经拉高）
* P17  GND 电源地
* P18  天线接口

https://item.taobao.com/item.htm?id=592413704702

3 KitProg

3.1 PSoC Programmer

3.2 CY8CKIT-145-40xx

插入 USB，Windows 下 'Devices and Printers' 显示 Cypress KitProg2

下载 fw-loader-2.3.1.610-windows.zip [1]

comca@AI-Workstation MINGW32 ~/work/asr6501/fw-loader
$ ./bin/fw-loader.exe --device-list
Cypress Firmware Updater, Version: 2.3.1.610
(C) Copyright 2018-2020 by Cypress Semiconductor
All Rights Reserved

Info: Start API initialization
Info: Connected - KitProg2-131B0F7303105400
Info: Hardware initialization complete (515 ms)
Connected supported devices:
        1: KitProg2-131B0F7303105400    FW Version 1.1.0

$ ./bin/fw-loader.exe --update-kp3
Cypress Firmware Updater, Version: 2.3.1.610
(C) Copyright 2018-2020 by Cypress Semiconductor
All Rights Reserved

Info: Start API initialization
Info: Connected - KitProg2-131B0F7303105400
Info: Hardware initialization complete (506 ms)
Device 'KitProg2-131B0F7303105400' opened successfully
Info: Kit FW is 'KitProg2' ver. 1.02 b000.  Upgrade file is 'KitProg3' ver. 1.21 b707.
Info: Disconnected - KitProg2-131B0F7303105400
Info: Connected - KitProg Bootloader-131B0F7303105400
Info: Bootloader Version: Major 1, Minor 1, Build 40
Info: FW Upgrade to version: 1.21 b707
Info: Bootloading of KitProg FW...
Info: Verifying of KitProg FW...
Info: Bootloading of DAPLink...
Info: Verifying of DAPLink...
Info: Upgrade completed
Info: Disconnected - KitProg Bootloader-131B0F7303105400
Info: Connected - KitProg3 CMSIS-DAP BULK-131B0F7303105400
FW update completed successfully

3.3 CY8CKIT-043

插入 USB，Windows 下 'Devices and Printers' 显示 Cypress KitProg

fw-loader 发现不了

4 OpenOCD

STLink-V2:

comcat@AI-Workstation MINGW32 ~/work/nodetao/toolchain/openocd-cypress (master)
$ ./bin/openocd.exe  -s ./scripts -f interface/stlink.cfg -c "source [find target/psoc4.cfg]; targets; shutdown"
Open On-Chip Debugger 0.10.0+dev-3.0.0.665 (2020-03-20-10:13)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
adapter speed: 2000 kHz
** Test Mode acquire not supported by selected adapter
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
    TargetName         Type       Endian TapName            State
--  ------------------ ---------- ------ ------------------ ------------
 0* psoc4.cpu          hla_target little psoc4.cpu          unknown
shutdown command invoked

$ ./bin/openocd.exe  -s ./scripts -f interface/stlink.cfg -c "program d:/BlinkyLED.hex verify reset; exit"

J-Link:

$ ./bin/openocd.exe  -s ./scripts -f interface/jlink.cfg -c "transport select swd; source [find target/psoc4.cfg];"

KitProg3:

comca@AI-Workstation MINGW32 ~/work/nodetao/toolchain/openocd-cypress (master)
$ ./bin/openocd.exe -s ./scripts -f interface/kitprog3.cfg -c "transport select swd; source [find target/psoc4.cfg];"
Open On-Chip Debugger 0.10.0+dev-3.0.0.665 (2020-03-20-10:13)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
adapter speed: 2000 kHz
** Auto-acquire enabled, use "set PSOC4_USE_ACQUIRE 0" to disable
cortex_m reset_config sysresetreq
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : CMSIS-DAP: SWD  Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 1.21.707
Info : KitProg3: Pipelined transfers enabled
Info : VTarget = 4.968 V
Info : kitprog3: acquiring PSoC device...
Info : clock speed 2000 kHz
Info : SWD DPIDR 0x0bc11477
Info : psoc4.cpu: hardware has 4 breakpoints, 2 watchpoints
Info : psoc4.cpu: external reset detected
*****************************************
** Silicon: 0x256A, Family: 0xB5, Rev.: 0x12 (A1)
** Detected Device: CY8C4147AZI-S445
** Detected Family: PSoC 4100S Plus
** Detected Main Flash size, kb: 128
** Chip Protection: protection OPEN
*****************************************
Info : Listening on port 3333 for gdb connections