捉虫日记 0004: jiffies stop
1 Phenomenon
Update emma3p to 2.6.26, kernel hang in calibrate_delay(), trace the function and found that jiffies is stop to update, following is the log:
Primary instruction cache 64kB, VIPT, 4-way, linesize 32 bytes. Primary data cache 64kB, 4-way, VIPT, cache aliases, linesize 32 bytes PID hash table entries: 1024 (order: 10, 4096 bytes) before time_init jiffies=4294892296 >> before sched_clock_init Console: colour dummy device 80x25 console [ttyS0] enabled Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) before mem_init Memory: 156900k/163840k available (3971k kernel code, 6788k reserved, 718k data, 208k init, 0k highmem) >>before calibrate_delay Calibrating delay loop... <0> ticks=4294892296, jiffies=4294892296
2 Analysis
Checked the time interrupt and found that the new kernel adopt the clock event strategy and you need to select the CEVT_R4K & CSRC_R4K options and this make the arch/mips/kernel/cevt-r4k.c & csrc-r4k.c can be compiled into kernel.
If you do not select these two options the kernel will use the definiens in include/asm-mips/time.h but this do not have any actually operations. These two functions are mips_clockevent_init() & init_mips_clocksource(). So the system will have no clock interrupt source and then the jiffies would be stop.
3 Solution
Add "select CEVT_R4K" and "select CSRC_R4K" to board specified configuration items. Seems like following:
config ET10068 bool "Support for NEC EMMA3P ET10068" select CEVT_R4K select CSRC_R4K select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_R9721 help This enables support for the R5432-based NEC ET10068 boards with VR5500 CPU.