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* [[基于忆阻器的DLA]] | * [[基于忆阻器的DLA]] | ||
+ | * [https://zhuanlan.zhihu.com/p/20924929 从OpenAI看深度学习研究前沿] | ||
+ | * [http://blog.csdn.net/cv_family_z/article/details/51917143 CNN网络二值化--XNOR-Net] | ||
+ | * [https://zhuanlan.zhihu.com/p/23255679 寒武纪——一个神经网络指令集架构] | ||
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+ | 获取人工智能AI前沿信息 https://zhuanlan.zhihu.com/p/21263408?refer=intelligentunit | ||
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+ | == Hardware == | ||
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+ | === GPU Architecture === | ||
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+ | * [http://haifux.org/lectures/267/Introduction-to-GPUs.pdf Introduction to GPU architecture] | ||
+ | * [[Nvidia GPU Architecture]] | ||
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+ | === TPU Architecture === | ||
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+ | Tensor Processing Unit(or TPUs) are application-specific integrated circuits (ASICs) developed specifically for machine learning. | ||
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+ | * [https://drive.google.com/file/d/0Bx4hafXDDq2EMzRNcy1vSUxtcEk/view Paper] | ||
+ | * [https://cloudplatform.googleblog.com/2017/04/quantifying-the-performance-of-the-TPU-our-first-machine-learning-chip.html Blog] Quantifying the performance of the TPU, our first machine learning chip 2017-04-05 | ||
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2018年5月17日 (四) 18:41的最后版本
目录 |
[编辑] 1 前沿
获取人工智能AI前沿信息 https://zhuanlan.zhihu.com/p/21263408?refer=intelligentunit
[编辑] 2 Hardware
[编辑] 2.1 GPU Architecture
[编辑] 2.2 TPU Architecture
Tensor Processing Unit(or TPUs) are application-specific integrated circuits (ASICs) developed specifically for machine learning.