查看ASR650x的源代码
←
ASR650x
跳转到:
导航
,
搜索
因为以下原因,你没有权限编辑本页:
您刚才请求的操作只有这个用户组中的用户才能使用:
用户
您可以查看并复制此页面的源代码:
== ASR6505 == * STM8L152 ** Up to 16MHz ** 4KB RAM (0x0000 ~ 0x0FFF, including 513B stack) ** 2KB EEPROM (0x1000 ~ 0x1FFF) ** 64KB Flash (0x8080 ~ 0x1 7FFF) ** SPI x1, I2C x1, UART x2 ** GPIO x30, ADC x3, SWIM x1 * 85mA @22dBm, 50mA@17dBm, 40mA@14dBm * SX1262 * 2.4V to 3.7V (3.9V max) Power supply * Sleep mode: 1uA without RTC, 1.6uA with RTC * QFN68, 8x8mm <br> == ASR6501 == === Overview === * PSoC 4100S Plus MCU ** 48 MHz ARM Cortex-M0+ Core ** up to 128kbytes of Flash memory and 16Kbytes of SRAM ** 6x configurable GPIOs, 1xI2C, 1xUART, 1xSWD ** 8-Channel DMA engine ** 12-bit 1Msps SAR ADC with differential and single-ended ** 32.768kHz External Watch Crystal Oscillator ** 4-33MHz External Crystal Oscillator for MCU (Optional) ** 32MHz External Crystal Oscillator for LoRa Radio ** Internal High frequency (48MHz) RC oscillator ** Internal Low frequency (40kHz) RC oscillator ** Internal PLL to generate 48MHz clock ** 1.71V to 5.5V Power supply ** Deep Sleep mode with 2.5uA * SX1262 * 2.4V to 3.7V (3.9V max) Power supply * Sleep mode: 2.7uA with RTC; 2uA without RTC * QFN48 6x6mm * [https://china.cypress.com/products/32-bit-arm-cortex-m0m0-psoc-4100-intelligent-analog-mcus 32-bit Arm® Cortex®-M0/M0+ PSoC® 4100 Intelligent Analog MCUs] * [https://www.cypress.com/documentation/datasheets/psoc-4-psoc-4100s-plus-256kb-datasheet-programmable-system-chip-psoc?source=search&cat=technical_documents PSOC 4100s plus 256KB Datasheet] * [https://www.cypress.com/documentation/datasheets/psoc-4-psoc-4100s-plus-datasheet-programmable-system-chip-psoc?source=search&cat=technical_documents PSOC 4100S Plus Datasheet][https://www.cypress.com/file/396611/download EN][https://www.cypress.com/file/400196/download CN] * [https://china.cypress.com/documentation/application-notes/an88619-psoc-4-hardware-design-considerations AN88619 - PSOC 4 HARDWARE DESIGN CONSIDERATIONS] ** [https://china.cypress.com/documentation/application-notes/an79953-getting-started-psoc-4 AN79953 - Getting Started with PSoC® 4] ** [https://china.cypress.com/documentation/application-notes/an86233-psoc-4-low-power-modes-and-power-reduction-techniques AN86233 - PSoC® 4 Low-Power Modes and Power Reduction Techniques] ** [https://www.cypress.com/documentation/application-notes/an91445-antenna-design-and-rf-layout-guidelines AN91445 - Antenna Design and RF Layout Guidelines] <br> === RF-AL42UH === [[文件:RF-AL42UH-pinmap.jpg]] <source lang=bash> * P1 GND 电源地 * P2 VDD, 电源输入,范围 2.8V ~ 3.6V DC * P3 ADC_IN,ADC输入脚,程序未启用,悬空 * P4 GPIO,MCU GPIO,悬空 * P5 AUX,MCU GPIO,悬空 * P6 SETA,MCU GPIO,悬空 * P7 RXD,UART 的 RX 信号 * P8 TXD,UART 的 TX 信号 * P9 SWD,SWD DATA引脚 * P10 SCLK,SWD CLK引脚 * P11 I2C_SCL,I2C引脚,程序未启用,悬空 * P12 I2C_SDA,I2C引脚,程序未启用,悬空 * P13 SETB,MCU GPIO,悬空 * P14 CTS,悬空 * P15 RTS,悬空 * P16 RESET,复位引脚,低电平有效。无须拉高(内部已经拉高) * P17 GND 电源地 * P18 天线接口 </source> * https://item.taobao.com/item.htm?id=592413704702 <br> == KitProg == === PSoC Programmer === * https://www.cypress.com/products/psoc-programming-solutions * https://www.cypress.com/file/505286/download <br> === CY8CKIT-145-40xx === 插入 USB,Windows 下 'Devices and Printers' 显示 Cypress KitProg2 下载 fw-loader-2.3.1.610-windows.zip [https://github.com/cypresssemiconductorco/Firmware-loader] <source lang=bash> comca@AI-Workstation MINGW32 ~/work/asr6501/fw-loader $ ./bin/fw-loader.exe --device-list Cypress Firmware Updater, Version: 2.3.1.610 (C) Copyright 2018-2020 by Cypress Semiconductor All Rights Reserved Info: Start API initialization Info: Connected - KitProg2-131B0F7303105400 Info: Hardware initialization complete (515 ms) Connected supported devices: 1: KitProg2-131B0F7303105400 FW Version 1.1.0 $ ./bin/fw-loader.exe --update-kp3 Cypress Firmware Updater, Version: 2.3.1.610 (C) Copyright 2018-2020 by Cypress Semiconductor All Rights Reserved Info: Start API initialization Info: Connected - KitProg2-131B0F7303105400 Info: Hardware initialization complete (506 ms) Device 'KitProg2-131B0F7303105400' opened successfully Info: Kit FW is 'KitProg2' ver. 1.02 b000. Upgrade file is 'KitProg3' ver. 1.21 b707. Info: Disconnected - KitProg2-131B0F7303105400 Info: Connected - KitProg Bootloader-131B0F7303105400 Info: Bootloader Version: Major 1, Minor 1, Build 40 Info: FW Upgrade to version: 1.21 b707 Info: Bootloading of KitProg FW... Info: Verifying of KitProg FW... Info: Bootloading of DAPLink... Info: Verifying of DAPLink... Info: Upgrade completed Info: Disconnected - KitProg Bootloader-131B0F7303105400 Info: Connected - KitProg3 CMSIS-DAP BULK-131B0F7303105400 FW update completed successfully </source> <br><br> === CY8CKIT-043 === 插入 USB,Windows 下 'Devices and Printers' 显示 Cypress KitProg fw-loader 发现不了 <br><br> == OpenOCD == * https://github.com/cypresssemiconductorco/openocd * [https://www.cypress.com/file/495061/download Cypress OpenOCD CLI User Guide] '''STLink-V2:''' <source lang=bash> comcat@AI-Workstation MINGW32 ~/work/nodetao/toolchain/openocd-cypress (master) $ ./bin/openocd.exe -s ./scripts -f interface/stlink.cfg -c "source [find target/psoc4.cfg]; targets; shutdown" Open On-Chip Debugger 0.10.0+dev-3.0.0.665 (2020-03-20-10:13) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'. adapter speed: 2000 kHz ** Test Mode acquire not supported by selected adapter Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD TargetName Type Endian TapName State -- ------------------ ---------- ------ ------------------ ------------ 0* psoc4.cpu hla_target little psoc4.cpu unknown shutdown command invoked $ ./bin/openocd.exe -s ./scripts -f interface/stlink.cfg -c "program d:/BlinkyLED.hex verify reset; exit" </source> '''J-Link:''' [[文件:JLink Interface Pinout SWD.jpg]] <source lang=bash> $ ./bin/openocd.exe -s ./scripts -f interface/jlink.cfg -c "transport select swd; source [find target/psoc4.cfg];" </source> '''KitProg3:''' <source lang=bash> comca@AI-Workstation MINGW32 ~/work/nodetao/toolchain/openocd-cypress (master) $ ./bin/openocd.exe -s ./scripts -f interface/kitprog3.cfg -c "transport select swd; source [find target/psoc4.cfg];" Open On-Chip Debugger 0.10.0+dev-3.0.0.665 (2020-03-20-10:13) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html adapter speed: 2000 kHz ** Auto-acquire enabled, use "set PSOC4_USE_ACQUIRE 0" to disable cortex_m reset_config sysresetreq Info : Listening on port 6666 for tcl connections Info : Listening on port 4444 for telnet connections Info : CMSIS-DAP: SWD Supported Info : CMSIS-DAP: FW Version = 2.0.0 Info : CMSIS-DAP: Interface Initialised (SWD) Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1 Info : CMSIS-DAP: Interface ready Info : KitProg3: FW version: 1.21.707 Info : KitProg3: Pipelined transfers enabled Info : VTarget = 4.968 V Info : kitprog3: acquiring PSoC device... Info : clock speed 2000 kHz Info : SWD DPIDR 0x0bc11477 Info : psoc4.cpu: hardware has 4 breakpoints, 2 watchpoints Info : psoc4.cpu: external reset detected ***************************************** ** Silicon: 0x256A, Family: 0xB5, Rev.: 0x12 (A1) ** Detected Device: CY8C4147AZI-S445 ** Detected Family: PSoC 4100S Plus ** Detected Main Flash size, kb: 128 ** Chip Protection: protection OPEN ***************************************** Info : Listening on port 3333 for gdb connections $ ./bin/openocd.exe -s ./scripts -f interface/kitprog3.cfg -c "transport select swd; source [find target/psoc4.cfg]; program ChipID.ino.hex verify reset; exit" Open On-Chip Debugger 0.10.0+dev-3.0.0.665 (2020-03-20-10:13) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html adapter speed: 2000 kHz ** Auto-acquire enabled, use "set PSOC4_USE_ACQUIRE 0" to disable cortex_m reset_config sysresetreq Info : CMSIS-DAP: SWD Supported Info : CMSIS-DAP: FW Version = 2.0.0 Info : CMSIS-DAP: Interface Initialised (SWD) Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1 Info : CMSIS-DAP: Interface ready Info : KitProg3: FW version: 1.21.707 Info : KitProg3: Pipelined transfers enabled Info : VTarget = 4.969 V Info : kitprog3: acquiring PSoC device... Info : clock speed 2000 kHz Info : SWD DPIDR 0x0bc11477 Info : psoc4.cpu: hardware has 4 breakpoints, 2 watchpoints Info : psoc4.cpu: external reset detected ***************************************** ** Silicon: 0x256A, Family: 0xB5, Rev.: 0x12 (A1) ** Detected Device: CY8C4147AZI-S445 ** Detected Family: PSoC 4100S Plus ** Detected Main Flash size, kb: 128 ** Chip Protection: protection OPEN ***************************************** Info : Listening on port 3333 for gdb connections Error: DP initialisation failed Info : kitprog3: acquiring PSoC device... Info : SWD DPIDR 0x0bc11477 target halted due to debug-request, current mode: Thread xPSR: 0xa1000000 pc: 0x10000040 msp: 0x20003fe8 ** Device acquired successfully ** Programming Started ** auto erase enabled Info : ignoring flash probed value, using configured bank size Info : Flash write discontinued at 0x000090a0, next section at 0x0001ffc0 Info : Padding image section 0 at 0x000090a0 with 96 bytes (bank write end alignment) Warn : Only mass erase available, erase skipped! (psoc4 mass_erase <bank_id>) [100%] [################################] [ Programming ] Info : Section start address 0x0001ffc0 breaks the required alignment of flash bank psoc4.mflash Info : Padding 192 bytes from 0x0001ff00 Warn : Only mass erase available, erase skipped! (psoc4 mass_erase <bank_id>) [100%] [################################] [ Programming ] Warn : no flash bank found for address 0x90500000 Warn : no flash bank found for address 0x90600000 Warn : no flash bank found for address 0xf0000000 wrote 37440 bytes from file ChipID.ino.hex in 3.366695s (10.860 KiB/s) ** Programming Finished ** ** Verify Started ** verified 37152 bytes in 0.109350s (331.790 KiB/s) ** Verified OK ** ** Resetting Target ** Error: DP initialisation failed Polling target psoc4.cpu failed, trying to reexamine Error: Could not find MEM-AP to control the core Examination failed, GDB will be halted. Polling again in 100ms </source> <br><br>
返回到
ASR650x
。
个人工具
登录
名字空间
页面
讨论
变换
查看
阅读
查看源代码
查看历史
操作
搜索
导航
首页
社区专页
新闻动态
最近更改
随机页面
帮助
工具箱
链入页面
相关更改
特殊页面