EFM32

来自Jack's Lab
2021年1月22日 (五) 18:14Comcat (讨论 | 贡献)的版本

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目录

1 Overview

1.1 EFM32ZG110

  • ARM Cortex-M0+ @ 32bit MCU up to 24 MHz
  • 32/16/8/4 kB flash, 4/2 kB RAM
  • 17 GPIOs
  • USART+UART x1
  • LEUART x1,
  • I2C x1
  • Timer(PWM) x2(6)
  • RTC x1
  • PCNT x1
  • WATCHDOG x1
  • ADC x1(2)
  • ACMP x1(2)
  • AES128
  • Super low-power
    • 20 nA @ 3 V Shutoff Mode
    • 0.5 μA @ 3V Stop mode (EM3), with brown-out detection and RAM retention
    • 0.9 μA @ 3V Deep Sleep mode (EM2)
    • 48 μA/MHz @ 3V Sleep mode (EM1)
    • 114 μA/MHz @ 3V Run mode (EM0)
  • Fast wake-up time of 2 µs
  • Power supply 1.98 to 3.8 V
  • QFN24


Core PinMap:

  • PIN19 --- PF0 --- DBG_SWCLK / BOOT_TX
  • PIN20 --- PF1 --- DBG_SWDIO / BOOT_RX
  • PIN23 --- PE12 --- SDA
  • PIN24 --- PE13 --- SCL


EFM32ZG110-QFN24-pinmap.png


最小系统:

  • PIN15 --- VDD 主供电,接 VCC
  • PIN16 --- DECOUPLE 解耦电容,必须接 1uF 到 GND! 1nF 会导致 erase flash 成功,但写 flash 会失败!
  • PIN02, PIN22 --- IOVDD 接 VCC
  • PIN09, PIN12 --- AVDD 接 VCC
  • PIN07 --- nRST 接 100K 到 VCC


编程口:

  • VCC (P) ---> 3.3V
  • GND (G) ---> GND
  • CLK (C) ---> SWCLK, PIN19 (PF0)
  • DIO (D) ---> SWDIO, PIN20 (PF1)
  • RST (R) ---> RST


SPI:

AutoECO-LoRa-Pin.png


  • RST --- PIN18 (PC15)
  • SEL --- PIN6 (PB8)
  • MOSI --- PIN3 (PC0)
  • MISO --- PIN4 (PC1)
  • SCK --- PIN5 (PB7)
  • RF_DIO0 ---> PIN8 (PB11)


Digital Pinmap:

D00 - PA00
D01 - PB07
D02 - PB08
D03 - PB11
D04 - PB13
D05 - PB14

D06 - PC00
D07 - PC01
D08 - PC14
D09 - PC15
D10 - PD06
D11 - PD07

D12 - PE12
D13 - PE13
D14 - PF00
D15 - PF01
D16 - PF02

TT2:

* PA0 ---> 10K ---> VBat
* PA0 ---> Relay_Always_Open ---> GND


* Dev_Power_Ctrl <--- { PIN17_PC14_D8 (PRS_CH0)  --- '''PIN13_PD6_D10_PT01''' };最新硬件控制 Dev_Power_Ctrl 的 PIN 变更为 PIN19_PF0_D14,依然同时给 PT 供电,PIN13 还是测这个脚的电压
* { PIN14_PD7_PD7_D11_PT02 --- T2_J2_T } <--- 1.1K 0.1% <--- { PIN17_PC14_D8 (PRS_CH0)  --- '''PIN13_PD6_D10_PT01''' }


* PIN2_IOVDD (Vbat) ---> 10K ---> { T2_J2_IO --- PIN21_PF2_D16_RES }


* PIN11_PB14 ---> T2_J8_Rx (LEU0_RX #1)
* PIN10_PB13 ---> T2_J8_Tx (LEU0_TX #1)

4合1:

* Dev_Power_Ctrl <---  PIN17_PC14_D8 (PRS_CH0)
* KEY <--- PIN1_PA0_D0, 10K 拉高到 VBat,按下 PIN1_PA0_D0 则接地
* Beep <--- PIN13_PD06_D10

* I2C_SCL <--- PIN24_PE13_D13
* I2C_SDA <--- PIN23_PE12_D12
* SH1106_RESET <--- PIN21_PF2_D16_RES


UART:

  • LEUART0
  • USART1


Peripheral:

#define AES_BASE          (0x400E0000UL) /**< AES base address  */
#define DMA_BASE          (0x400C2000UL) /**< DMA base address  */
#define MSC_BASE          (0x400C0000UL) /**< MSC base address  */
#define EMU_BASE          (0x400C6000UL) /**< EMU base address  */
#define RMU_BASE          (0x400CA000UL) /**< RMU base address  */
#define CMU_BASE          (0x400C8000UL) /**< CMU base address  */
#define TIMER0_BASE       (0x40010000UL) /**< TIMER0 base address  */
#define TIMER1_BASE       (0x40010400UL) /**< TIMER1 base address  */
#define ACMP0_BASE        (0x40001000UL) /**< ACMP0 base address  */
#define USART1_BASE       (0x4000C400UL) /**< USART1 base address  */
#define PRS_BASE          (0x400CC000UL) /**< PRS base address  */
#define IDAC0_BASE        (0x40004000UL) /**< IDAC0 base address  */
#define GPIO_BASE         (0x40006000UL) /**< GPIO base address  */
#define VCMP_BASE         (0x40000000UL) /**< VCMP base address  */
#define ADC0_BASE         (0x40002000UL) /**< ADC0 base address  */
#define LEUART0_BASE      (0x40084000UL) /**< LEUART0 base address  */
#define PCNT0_BASE        (0x40086000UL) /**< PCNT0 base address  */
#define I2C0_BASE         (0x4000A000UL) /**< I2C0 base address  */
#define RTC_BASE          (0x40080000UL) /**< RTC base address  */
#define WDOG_BASE         (0x40088000UL) /**< WDOG base address  */
#define CALIBRATE_BASE    (0x0FE08000UL) /**< CALIBRATE base address */
#define DEVINFO_BASE      (0x0FE081B0UL) /**< DEVINFO base address */
#define ROMTABLE_BASE     (0xF00FFFD0UL) /**< ROMTABLE base address */
#define LOCKBITS_BASE     (0x0FE04000UL) /**< Lock-bits page base address */
#define USERDATA_BASE     (0x0FE00000UL) /**< User data page base address */


Flash:

The size of the main block is device dependent. The largest size available is 32 kB (32 pages). The information block has 1024 bytes available for user data. The information block also contains chip configuration data located in a reserved area. The main block is mapped to address 0x00000000 and the information block is mapped to address 0x0FE00000. All Flash memory is organized into 1024 byte pages.

/** Flash and SRAM limits for EFM32ZG110F32 */
#define FLASH_BASE           (0x00000000UL) /**< Flash Base Address */
#define FLASH_SIZE           (0x00008000UL) /**< Available Flash Memory */
#define FLASH_PAGE_SIZE      1024           /**< Flash Memory page size */
#define SRAM_BASE            (0x20000000UL) /**< SRAM Base Address */
#define SRAM_SIZE            (0x00001000UL) /**< Available SRAM Memory */
#define __CM0PLUS_REV        0x001          /**< Cortex-M0+ Core revision r0p1 */
#define PRS_CHAN_COUNT       4              /**< Number of PRS channels */
#define DMA_CHAN_COUNT       4              /**< Number of DMA channels */
#define EXT_IRQ_COUNT        19             /**< Number of External (NVIC) interrupts */


Memory:

/** Memory Base addresses and limits */
#define FLASH_MEM_BASE       ((uint32_t) 0x0UL)        /**< FLASH base address  */
#define FLASH_MEM_SIZE       ((uint32_t) 0x10000000UL) /**< FLASH available address space  */
#define FLASH_MEM_END        ((uint32_t) 0xFFFFFFFUL)  /**< FLASH end address  */
#define FLASH_MEM_BITS       ((uint32_t) 0x28UL)       /**< FLASH used bits  */
#define AES_MEM_BASE         ((uint32_t) 0x400E0000UL) /**< AES base address  */
#define AES_MEM_SIZE         ((uint32_t) 0x400UL)      /**< AES available address space  */
#define AES_MEM_END          ((uint32_t) 0x400E03FFUL) /**< AES end address  */
#define AES_MEM_BITS         ((uint32_t) 0x10UL)       /**< AES used bits  */
#define PER_MEM_BASE         ((uint32_t) 0x40000000UL) /**< PER base address  */
#define PER_MEM_SIZE         ((uint32_t) 0xE0000UL)    /**< PER available address space  */
#define PER_MEM_END          ((uint32_t) 0x400DFFFFUL) /**< PER end address  */
#define PER_MEM_BITS         ((uint32_t) 0x20UL)       /**< PER used bits  */
#define RAM_MEM_BASE         ((uint32_t) 0x20000000UL) /**< RAM base address  */
#define RAM_MEM_SIZE         ((uint32_t) 0x40000UL)    /**< RAM available address space  */
#define RAM_MEM_END          ((uint32_t) 0x2003FFFFUL) /**< RAM end address  */
#define RAM_MEM_BITS         ((uint32_t) 0x18UL)       /**< RAM used bits  */
#define RAM_CODE_MEM_BASE    ((uint32_t) 0x10000000UL) /**< RAM_CODE base address  */
#define RAM_CODE_MEM_SIZE    ((uint32_t) 0x20000UL)    /**< RAM_CODE available address space  */
#define RAM_CODE_MEM_END     ((uint32_t) 0x1001FFFFUL) /**< RAM_CODE end address  */
#define RAM_CODE_MEM_BITS    ((uint32_t) 0x17UL)       /**< RAM_CODE used bits  */


1.2 EFM32HG

  • ARM Cortex-M+ @ 25 MHz
  • Crystalless USB w/ built-in 3.3V regulator for minimal part count
  • 64/32 kB flash, 8/4 kB RAM
  • 17 GPIOs
  • USART+UART x2
  • LEUART x1,
  • I2C x1
  • Timer(PWM) x3(9)
  • 24bit RTC x1
  • PCNT x1
  • WATCHDOG x1
  • ADC x1(2)
  • ACMP x1(2)
  • Capacitive touch sensors
  • AES128 in 54 cycles
  • USB (EFM32HG3xx; There is no such interface in EFM32HG110Fxx)
    • Fully USB 2.0 compliant
    • Crystal free operation
    • On-chip PHY and embedded 5V to 3.3V regulator
  • Super low-power
    • 20 nA @ 3 V Shutoff Mode
    • 0.5 μA @ 3V Stop mode (EM3), with brown-out detection and RAM retention
    • 0.9 μA @ 3V Deep Sleep mode (EM2)
    • 46 μA/MHz @ 3V Sleep mode (EM1)
    • 114 μA/MHz @ 3V Run mode (EM0)
  • Power supply 1.98 to 3.8 V
  • QFN24/QFN32


EFM32HG110F32/F64 与 EFM32ZG110F32 管脚完全兼容,硬件可直接替换。。。


EFM32HG Datasheet



1.3 EFM32GG

EFM32GG230F512:

  • 32-bit ARM Cortex-M3 processor running at up to 48 MHz
  • 512 KB Flash
  • 128 KB RAM
  • Up to 90 General Purpose I/O pins
  • 12 Channel DMA Controller
  • Hardware AES with 128/256-bit Keys in 54/75 cycles
  • USB
    • Fully USB 2.0 compliant
    • Crystal free operation
    • On-chip PHY and embedded 5V to 3.3V regulator
  • Up to 90 General Purpose I/O pins
  • UART x2
  • LeUART x2
  • I2C x2
  • 12bit 1M/s ADC x8
  • 12bit 0.5M/s DAC x2
  • Analog Comparator x2
  • Super low power
    • 20 nA @ 3 V Shutoff Mode
    • 0.4 µA @ 3 V Shutoff Mode with RTC
    • 0.8 µA @ 3 V Stop Mode, including Power-on Reset, Brown-out Detector, RAM and CPU retention
    • 1.1 µA @ 3 V Deep Sleep Mode, including RTC with 32768 Hz oscillator, Power-on Reset, Brown-out Detector, RAM and CPU retention
    • 80 µA/MHz @ 3 V Sleep Mode
    • 219 µA/MHz @ 3 V Run Mode, with code executed from flash
  • Single power supply 1.98 - 3.8 V
  • QFN64


EFM32GG230-pinmap.png.png

AutoECO-LoRa-Pin.png


  • RST --- PIN15
  • SEL --- PIN14
  • MOSI --- PIN11
  • MISO --- PIN12
  • SCK --- PIN13
  • RF_DIO0 ---> PIN16
  • OLED_PWR_CTRL --> PIN1 (PA0)
  • LoRaModule_PWR_CTRL --> PIN6
  • TX --> PIN24
  • RX --> PIN25
  • KEY --> PIN36_PD8
  • I2C_SDA --> PIN9_PC0_I2C0_SDA#4
  • I2C_SCL --> PIN10_PC1_I2C0_SCL#4
  • 5V - 3V3 无开关,3V3 直接给 MCU 供电


Pinmap:




2 Bootloader

2.1 UART Bootloader

EFM32 出厂自带 UART bootloader

拉高 DBG_SWCLK 通电启动 EFM32 Series 0, EZR32 Series 0, or EFM32 Series 1 即可进入 Uart Bootloader:

  • The bootloader will check the application space in flash.
    • If the application space contains a valid application, the bootloader will run that application.
    • If there is not a valid application present, the bootloader will sleep in EM2 to conserve power, while periodically checking the bootloader pins.

Note: DBG_SWCLK has an internal pull-down. Leaving this pin unconnected will not invoke bootloader mode on reset.


EFM32ZG110 Pin:

  • PIN19 --- PF0 --- DBG_SWCLK / BOOT_TX -----> Serial_RX
  • PIN20 --- PF1 --- DBG_SWDIO / BOOT_RX -----> Serial_TX


Once the bootloader has been successfully initialized it will print the bootloader version and chip unique ID:

1.40 ChipID: F08AB6000B153525



2.2 ToBoot

USB DFU bootloader - "toboot"

https://github.com/im-tomu/toboot



3 Flash Tools

3.1 Overview

EFM32 的刷写和调试协议规范:AN0062 Programming Internal Flash Over SWDI

刷写硬件官方推荐 SEGGER 公司的 J-Link,EFM32 开发板都集成了。。。配套使用官方工具 Commander (JLinkARM.dll)

也可以使用 STLINK V2,配套使用 OpenOCD。。。


3.2 OpenOCD

OpenOCD Doc

UserData support patch

FT2232H OpenOCD

Build OpenOCD in Windows https://elinux.org/Compiling_OpenOCD_Win7

OpenOCD with FT2232H

1. Download and install setup-x86.exe (32-bit system)

2. 选择 Install from Internet, 在 "User URL" 处输入以下地址:

 https://mirrors.tuna.tsinghua.edu.cn/cygwin/

点击 Add 按钮, 然后选中 https://mirrors.tuna.tsinghua.edu.cn, 点击”下一步”进行安装。

3. 选择如下软件包:

autobuild
autoconf
autoconf-archive
automake
libtool
make
pkg-config
git
patchutils
################
mingw64-i686-binutils
mingw64-i686-gcc-core
mingw64-i686-pthreads
mingw64-i686-runtime
mingw64-i686-libusb 1.0
################

运行环境如果是 cygwin(不推荐) 则把如上相关包换成:

gcc-core
libusb1.0
libusb1.0-devel
usbutils

4. git clone

$ git clone git://git.code.sf.net/p/openocd/code  openocd
$ cd openocd
$ mkdir build
$ cd build
$ ../configure --enable-ftdi --enable-stlink --disable-doxygen-html --disable-werror --disable-libtool-lock --build=i686-pc-cygwin --host=i686-w64-mingw32
$ make
$ make install

编译完后,找到 libgcc_s_sjlj-1.dll libusb-1.0.dll openocd.exe 置于: dist/bin/ 下,usr/local/share/openocd 放在 dist/share 下,打包 dist/ 即可 release 到其他机器运行


You can flash the bin file into the EFM32 via OpenOCD with STLINK V2:

Pin:

  • PIN19 --- PF0 --- DBG_SWCLK -----> STLINK_V2-SWCLK
  • PIN20 --- PF1 --- DBG_SWDIO -----> STLINK_V2-SWDIO
  • PIN-7 --- RSTn --- RESET ---> STLINK_V2-Reset


Windows:


Flashing the toboot with ST-Link:

$ ../../toolchain/openocd/bin/openocd -f interface/stlink.cfg -c "set CPUTAPID 0x0bc11477; source [find target/efm32.cfg];   \
 init; targets; reset halt; flash probe 0; flash write image erase eerpom.bin; verify reset; shutdown"
Open On-Chip Debugger 0.10.0 (2019-10-24) [https://github.com/sysprogs/openocd]
Licensed under GNU GPL v2
libusb1 09e75e98b4d9ea7909e8837b7a3f00dda4589dc3
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Info : clock speed 1000 kHz
Info : STLINK V2J27S6 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.233400
Info : efm32.cpu: hardware has 4 breakpoints, 2 watchpoints
Info : Listening on port 3333 for gdb connections
target halted due to debug-request, current mode: Thread
xPSR: 0x81000000 pc: 0x000005e8 msp: 0x20001000
Info : detected part: EFM32ZG Zero Gecko, rev 143
Info : flash size = 32kbytes
Info : flash page size = 1024bytes
efm32
flash
  flash bank bank_id driver_name base_address size_bytes chip_width_bytes
            bus_width_bytes target [driver_options ...]
  flash banks
  flash erase_address ['pad'] ['unlock'] address length
  flash erase_check bank_id
  flash erase_sector bank_id first_sector_num (last_sector_num|'last')
  flash fillb address value n
  flash fillh address value n
  flash fillw address value n
  flash info bank_id ['sectors']
  flash init
  flash list
  flash padded_value bank_id value
  flash probe bank_id
  flash protect bank_id first_block [last_block|'last'] ('on'|'off')
  flash read_bank bank_id filename [offset [length]]
  flash verify_bank bank_id filename [offset]
  flash write_bank bank_id filename [offset]
  flash write_image [erase] [unlock] filename [offset [file_type]]
gdb_flash_program ('enable'|'disable')


J-Link:

J-Link:

JLink Interface Pinout SWD.jpg


使用 5 根线: VTref, GND, SWIO, SWCLK, RESET

$ ../../toolchain/openocd-nt/bin/openocd -f interface/jlink.cfg -c "transport select swd; set CPUTAPID 0x0bc11477; source [find target/efm32.cfg]; init; targets; reset halt; program build/main.bin verify reset; shutdown"
Open On-Chip Debugger 0.10.0+dev-00957-g9de7d9c8 (2019-11-18-15:06)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : J-Link V9 compiled Dec 13 2019 11:14:50
Info : Hardware version: 9.30
Info : VTarget = 3.295 V
Info : clock speed 1000 kHz
Info : SWD DPIDR 0x0bc11477
Info : efm32.cpu: hardware has 4 breakpoints, 2 watchpoints
Info : efm32.cpu: external reset detected
Info : Listening on port 3333 for gdb connections
target halted due to debug-request, current mode: Thread
xPSR: 0x21000000 pc: 0x00000674 msp: 0x20001000
target halted due to debug-request, current mode: Thread
xPSR: 0x21000000 pc: 0x00000674 msp: 0x20001000
** Programming Started **
Info : detected part: EFM32ZG Zero Gecko, rev 143
Info : flash size = 32kbytes
Info : flash page size = 1024bytes
** Programming Finished **
** Verify Started **
** Verified OK **
** Resetting Target **
shutdown command invoked

comca@AI-Workstation MINGW32 ~/work/nodetao/toolchain (master)
$ ./openocd-nt/bin/openocd -f interface/jlink.cfg -c "transport select swd; set CPUTAPID 0x0bc11477; source [find target/efm32.cfg]; init; targets; reset halt; program ../sketch/aeco-hrx/fw/T2abc-v0613-nodbg.bin verify reset; shutdown"
Open On-Chip Debugger 0.10.0+dev-00957-g9de7d9c8 (2019-11-18-15:06)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : J-Link V9 compiled Dec 13 2019 11:14:50
Info : Hardware version: 9.30
Info : VTarget = 3.291 V
Info : clock speed 1000 kHz
Info : SWD DPIDR 0x0bc11477
Info : efm32.cpu: hardware has 4 breakpoints, 2 watchpoints
Info : efm32.cpu: external reset detected
Info : Listening on port 3333 for gdb connections
target halted due to debug-request, current mode: Thread
xPSR: 0x21000000 pc: 0x00000e84 msp: 0x20001000
target halted due to debug-request, current mode: Thread
xPSR: 0x21000000 pc: 0x00000e84 msp: 0x20001000
** Programming Started **
Info : detected part: EFM32ZG Zero Gecko, rev 143
Info : flash size = 32kbytes
Info : flash page size = 1024bytes
** Programming Finished **
** Verify Started **
** Verified OK **
** Resetting Target **
shutdown command invoked


3.3 Commander

硬件使用 J-Link:

JLink Interface Pinout SWD.jpg


使用 5 根线: VTref, GND, SWIO, SWCLK, RESET

Simplicity Commander is the Silabs official tool. It is invoked using a simple Command Line Interface (CLI).

  • Flash their own applications.
  • Configure their own applications.
  • Create binaries for production.

Simplicity Commander is designed to support the Silicon Labs Wireless STK and STK platforms

By default in Studio v4, Simplicity Commander can be found at the following path:

 C:\SiliconLabs\SimplicityStudio\v4\developer\adapter_packs\commander\commander.exe

Doc: Simplicity Commander Reference Guide

Download:

Basic:

$ commander flash --help

$ commander adapter probe --serialno <J-Link serial number> [--kit] [--boards] [--firmware]
$ commander adapter probe --serialno 440050184
$ commander adapter reset

$ commander device info --tif SWD–-speed 1000    #  1000 ~ 8000 kHz
# If the --tif and --speed options are not used, the default configuration is SWD and 4000 kHz
Setting debug interface speed to 1000 kHz
Setting debug interface to SWD
Part Number : EFR32BG1P332F256GJ43
Die Revision : A2
Production Ver : 138
Flash Size : 256 kB
SRAM Size : 32 kB
Unique ID : 000b57fffe0934e3
DONE


Program user data page:

$ commander.exe readmem --range 0x0FE081F0:0x0FE081F8 -d EFM32ZG110F32     # show the chip uuid @devinfo region

$ commander readmem --region @userdata --outfile user.hex -d EFM32ZG110F32    # or: .bin, .s37
Reading 2048 bytes from 0x0fe00000...
Writing to userpage.hex...
DONE

$ commander flash --address 0x0fe00000 12008130001.bin -d EFM32ZG110F32

# --region: EFM32, EZR32, EFR32: @mainflash, @userdata, @lockbits, @devinfo
# EM3xx: @mfb, @cib, @fib

$ commander readmem --range 0x0FE00000:+8 -d EFM32ZG110F32    # show the first 8 bytes @userdata region

$ commander device pageerase --region @userdata    # erase the userdata area
Erasing range 0x0fe00000 - 0x0fe00400
DONE

$ commander device pageerase –-range 0x200:0x6000
Erasing range 0x00000000 - 0x00006000
DONE

Flash serveral files:

$ commander flash blink.s37 userpage.hex
Adding file blink.s37...
Adding file userpage.hex...
Flashing 2812 bytes, starting at address 0x00000000
Resetting...
Uploading flash loader...
Waiting for flashloader to become ready...
Erasing flash...
Flashing...
Verifying written data...
Finished!
Flashing 2048 bytes, starting at address 0x0fe00000
Resetting...
Uploading flash loader...
Waiting for flashloader to become ready...
Erasing flash...
Flashing...
Verifying written data...
Resetting...
Finished!
DONE

Patch Flash:

$ commander flash -–patch <address>:<data>[:length]

$ commander flash --patch 0x120:0xAB --patch 0x3200:0xA5A5:2
Patching 0x00000120 = 0xAB...
Patching 0x00003200 = 0xA5A5...
Flashing 2048 bytes, starting at address 0x00000000
Resetting...
Uploading flash loader...
Waiting for flashloader to become ready...
Erasing flash...
Flashing...
Verifying written data...
Finished!
Flashing 2048 bytes, starting at address 0x00003000
Resetting...
Uploading flash loader...
Waiting for flashloader to become ready...
Erasing flash...
Flashing...
Verifying written data...
Resetting...
Finished!
DONE

Device Lock and Protection:

$ commander device lock –-debug enable
Locking debug access...
DONE

$ commander device lock –-debug disable
ERROR: Could not get MCU information
Removing all locks/protection...
Unlocking debug access (triggers a mass erase)...
DONE

$ commander device protect --write --range <startaddress>:<endaddress>
$ commander device protect --write --range 0x0:0x4000    # Protects all flash pages in the first 16 kB

$ commander device protect --write --region @mainflash
Write-protecting all pages in main flash.
DONE

$ commander device protect --write --disable
Disabling all write protection for all pages
DONE


$ commander device masserase
Erasing chip...
DONE

$ commander device reset
Resetting chip...
DONE

$ commander device recover
Recovering "bricked" device...
DONE

$ commander aem measure [–-windowlength <time in ms>]
$ commander aem measure –-windowlength 200
Averaged over 200 ms:
Current [mA]: 5.359
Power [mW] : 17.763
Voltage [V] : 3.314
DONE



4 ARDUINO_EFM32

Build message:

"arm-none-eabi-g++" -c -g -Os -w -std=gnu++14 -fpermissive -ffunction-sections -fdata-sections -nostdlib -fno-threadsafe-statics --param max-inline-insns-single=500  \
-fno-rtti -Dprintf=iprintf -w -x c++ -E -CC -DARDUINO=10807 -DARDUINO_efm32tg110f32 -DARDUINO_ARCH_EFM32 -DARM_MATH_CM3 -DEFM32TG110F32   \
-mcpu=cortex-m3 -mthumb -mthumb -DF_CPU=28000000L -DOSC28000000L -DUSE_HFRCO -DEFM32TG -DEFM32GENERIC -DRAM_LENGTH=4096   \
-DFLASH_LENGTH=32768 -DMENU_SERIAL=SerialLEUART0  \
"-I$(build_dir)/sketch" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino" "-I$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110"  \
 "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino/efm32" "-I$(ARDU_DIR)/hardware/arm/EFM32/system"   \
"-I$(ARDU_DIR)/hardware/arm/EFM32/system/CMSIS/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/emlib/inc"  \
"-I$(ARDU_DIR)/hardware/arm/EFM32/system/SiliconLabs/EFM32TG/Include" "$(build_dir)/sketch/Blink.ino.cpp" -o nul

Generating function prototypes...
"arm-none-eabi-g++" -c -g -Os -w -std=gnu++14 -fpermissive -ffunction-sections -fdata-sections -nostdlib -fno-threadsafe-statics --param max-inline-insns-single=500  \
-fno-rtti -Dprintf=iprintf -w -x c++ -E -CC -DARDUINO=10807 -DARDUINO_efm32tg110f32 -DARDUINO_ARCH_EFM32 -DARM_MATH_CM3 -DEFM32TG110F32  \
-mcpu=cortex-m3 -mthumb -mthumb -DF_CPU=28000000L -DOSC28000000L -DUSE_HFRCO -DEFM32TG -DEFM32GENERIC -DRAM_LENGTH=4096  \
-DFLASH_LENGTH=32768 -DMENU_SERIAL=SerialLEUART0  \
"-I$(build_dir)/sketch" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino" "-I$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110"  \
"-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino/efm32" "-I$(ARDU_DIR)/hardware/arm/EFM32/system"  \
"-I$(ARDU_DIR)/hardware/arm/EFM32/system/CMSIS/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/emlib/inc"  \
"-I$(ARDU_DIR)/hardware/arm/EFM32/system/SiliconLabs/EFM32TG/Include"  \
"$(build_dir)/sketch/Blink.ino.cpp" -o "$(build_dir)/preproc/ctags_target_for_gcc_minus_e.cpp"

"$(ARDU_DIR)/tools-builder/ctags/5.8-arduino11/ctags" -u --language-force=c++ -f - --c++-kinds=svpf --fields=KSTtzns --line-directives  \
"$(build_dir)/preproc/ctags_target_for_gcc_minus_e.cpp"

Compiling sketch...
"arm-none-eabi-g++" -c -g -Os -w -fno-exceptions -std=gnu++14 -fpermissive -ffunction-sections -fdata-sections -nostdlib -fno-threadsafe-statics --param max-inline-insns-single=500  \
-fno-rtti -Dprintf=iprintf -MMD -DARDUINO=10807 -DARDUINO_efm32tg110f32 -DARDUINO_ARCH_EFM32 -DARM_MATH_CM3 -DEFM32TG110F32  \
-mcpu=cortex-m3 -mthumb -mthumb -DF_CPU=28000000L -DOSC28000000L -DUSE_HFRCO -DEFM32TG -DEFM32GENERIC -DRAM_LENGTH=4096  \
-DFLASH_LENGTH=32768 -DMENU_SERIAL=SerialLEUART0  \
"-I$(build_dir)/sketch" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino" "-I$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110"  \
"-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino/efm32" "-I$(ARDU_DIR)/hardware/arm/EFM32/system"  \
"-I$(ARDU_DIR)/hardware/arm/EFM32/system/CMSIS/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/emlib/inc"  \
"-I$(ARDU_DIR)/hardware/arm/EFM32/system/SiliconLabs/EFM32TG/Include" "$(build_dir)/sketch/Blink.ino.cpp" -o "$(build_dir)/sketch/Blink.ino.cpp.o"
Compiling libraries...
Compiling core...
"arm-none-eabi-gcc" -c -g -Os -w -fno-exceptions -std=gnu11 -ffunction-sections -fdata-sections -nostdlib --param max-inline-insns-single=500 -Dprintf=iprintf -MMD -DARDUINO=10807 -DARDUINO_efm32tg110f32 -DARDUINO_ARCH_EFM32 -DARM_MATH_CM3 -DEFM32TG110F32 -mcpu=cortex-m3 -mthumb -mthumb -DF_CPU=28000000L -DOSC28000000L -DUSE_HFRCO -DEFM32TG -DEFM32GENERIC -DRAM_LENGTH=4096 -DFLASH_LENGTH=32768 -DMENU_SERIAL=SerialLEUART0 "-I$(build_dir)/sketch" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino" "-I$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino/efm32" "-I$(ARDU_DIR)/hardware/arm/EFM32/system" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/CMSIS/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/emlib/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/SiliconLabs/EFM32TG/Include" "$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110/variant.c" -o "$(build_dir)/core/variant.c.o"
"arm-none-eabi-g++" -c -g -Os -w -fno-exceptions -std=gnu++14 -fpermissive -ffunction-sections -fdata-sections -nostdlib -fno-threadsafe-statics --param max-inline-insns-single=500 -fno-rtti -Dprintf=iprintf -MMD -DARDUINO=10807 -DARDUINO_efm32tg110f32 -DARDUINO_ARCH_EFM32 -DARM_MATH_CM3 -DEFM32TG110F32 -mcpu=cortex-m3 -mthumb -mthumb -DF_CPU=28000000L -DOSC28000000L -DUSE_HFRCO -DEFM32TG -DEFM32GENERIC -DRAM_LENGTH=4096 -DFLASH_LENGTH=32768 -DMENU_SERIAL=SerialLEUART0 "-I$(build_dir)/sketch" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino" "-I$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino/efm32" "-I$(ARDU_DIR)/hardware/arm/EFM32/system" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/CMSIS/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/emlib/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/SiliconLabs/EFM32TG/Include" "$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110/variant.cpp" -o "$(build_dir)/core/variant.cpp.o"
"arm-none-eabi-gcc" -c -g -Os -w -fno-exceptions -std=gnu11 -ffunction-sections -fdata-sections -nostdlib --param max-inline-insns-single=500 -Dprintf=iprintf -MMD -DARDUINO=10807 -DARDUINO_efm32tg110f32 -DARDUINO_ARCH_EFM32 -DARM_MATH_CM3 -DEFM32TG110F32 -mcpu=cortex-m3 -mthumb -mthumb -DF_CPU=28000000L -DOSC28000000L -DUSE_HFRCO -DEFM32TG -DEFM32GENERIC -DRAM_LENGTH=4096 -DFLASH_LENGTH=32768 -DMENU_SERIAL=SerialLEUART0 "-I$(build_dir)/sketch" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino" "-I$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110" "-I$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino/efm32" "-I$(ARDU_DIR)/hardware/arm/EFM32/system" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/CMSIS/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/emlib/inc" "-I$(ARDU_DIR)/hardware/arm/EFM32/system/SiliconLabs/EFM32TG/Include" "$(ARDU_DIR)/hardware/arm/EFM32/cores/arduino/hooks.c" -o "$(build_dir)/core/hooks.c.o"

"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/Print.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/RingBuffer.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/Stream.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/WMath.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/WString.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/abi.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/avr/dtostrf.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/HardwareSerial.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/avr_emulation.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/core_callback.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/debug.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/efm32adc.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/efm32dac.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/efm32gpio.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/efm32init.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/efm32pwm.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32/gpiointerrupt.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32_hal/emlib_part1.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32_hal/emlib_part2.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32_hal/startup.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/efm32_hal/system.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/hooks.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/itoa.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/main.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/new.cpp.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/syscalls.c.o"
"arm-none-eabi-ar" rcs "$(build_dir)/core/core.a" "$(build_dir)/core/wiring_shift.c.o"
Archiving built core (caching) in: C:\Users\Jack\AppData\Local\Temp\arduino_cache_982407\core\core_ebcd316fc5c7d0e6d808fa4705f7642f.a

Linking everything together...
"arm-none-eabi-gcc" -mcpu=cortex-m3 -mthumb -mthumb -Os -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all  \
-Wl,--warn-common "-T$(ARDU_DIR)/hardware/arm/EFM32/variants/efm32Tg110/ld/efm32tg110f32.ld" "-Wl,-Map,$(build_dir)/Blink.ino.map" -o "$(build_dir)/Blink.ino.elf"  \
"-L$(build_dir)" -Wl,--start-group -u _sbrk -u link -u _close -u _fstat  \
-u _isatty -u _lseek -u _read -u _write -u _exit -u kill -u _getpid "$(build_dir)/sketch/Blink.ino.cpp.o" "$(build_dir)/core/variant.c.o" "$(build_dir)/core/variant.cpp.o"  \
"$(build_dir)/core/core.a" -lstdc++ -lc -Wl,--end-group -lm -lgcc --specs=nano.specs

"arm-none-eabi-objcopy" -O binary "$(build_dir)/Blink.ino.elf" "$(build_dir)/Blink.ino.bin"
"aetharm-none-eabi-objcopy" -O ihex "$(build_dir)/Blink.ino.elf" "$(build_dir)/Blink.ino.hex"

"arm-none-eabi-size" -A "$(build_dir)/Blink.ino.elf"
Sketch uses 3960 bytes (12%) of program storage space. Maximum is 32768 bytes.
Global variables use 328 bytes (8%) of dynamic memory, leaving 3768 bytes for local variables. Maximum is 4096 bytes.

hardware/tools/win/jlinkob_upload.bat COM9 {upload.altID} {upload.usbID} C:\Users\Jack\AppData\Local\Temp\arduino_build_619136/Blink.ino.hex  \
EFM32G222F128 0x00000000 VECT_TAB_OFFSET=0x0000000



5 Tomu

5.1 QuickStart


5.2 Basic


5.3 Flashing the toboot

Brand-new EFM32HG will not have Toboot installed. Instead, they might have the SiLabs AN0042 bootloader.

The recommend way to load the bootloader onto a Chip is using a Raspberry Pi with OpenOCD. Instructions for doing this can be found in the openocd directory. You need OpenOCD version 0.10.0 or later to have EFM32HG support.

Tomu can be powered using the 3.3V pin, so you can create a sort of "programming wand" by bringing 3.3V, GND, SCK, and SIO out to a 0.1" header, running openocd in a loop, and touching the programming pins on the side of a Tomu board. The process only takes a few seconds, so contact doesn't have to be great.


5.4 Install dfu-util

The dfu-util suite of programs is used to talk to Toboot

Ubuntu and Debian

 sudo apt-get install dfu-util

Create /etc/udev/rules.d/10-tomu.rules and populate it with the following:

 ATTRS{idProduct}=="70b1", ATTRS{idVendor}=="1209", MODE="777"
 (Note: you can give it a more restrictive mode if you also give it a group that you’re in)


Windows

Download dfu-util-static.exe from the dfu-util repository and rename it to dfu-util.exe. Place it somewhere in your $PATH for convenience. To build examples, you’ll also want to get dfu-suffix.exe and put it in your $PATH.


Mac

Install Homebrew and run:

 brew install dfu-util


6 EFM32ZG Clock

  • 1-21 MHz High Frequency RC Oscillator (HFRCO)
    • CMU_HFRCOBandSet(cmuHFRCOBand_1MHz); // 1.2MHz
    • CMU_HFRCOBandSet(cmuHFRCOBand_7MHz); // 6.6MHz
    • CMU_HFRCOBandSet(cmuHFRCOBand_11MHz);
    • CMU_HFRCOBandSet(cmuHFRCOBand_14MHz);
    • CMU_HFRCOBandSet(cmuHFRCOBand_21MHz);
    • CMU_HFRCOBandSet(cmuHFRCOBand_28MHz);
  • 4-24 MHz High Frequency Crystal Oscillator (HFXO)
  • 32768 Hz Low Frequency RC Oscillator (LFRCO)
  • 32768 Hz Low Frequency Crystal Oscillator (LFXO)
  • 1000 Hz Ultra Low Frequency RC Oscillator (ULFRCO)


7 Low Power

7.1 Energy Mode

  • EM0 (Run Mode): 114 µA/MHz; All peripherals can be active
  • EM1 (Sleep Mode): 48 µA/MHz; All peripherals, including DMA, PRS and memory system, are still available
  • EM2 (Deep Sleep Mode): 0.9 µA; High-Frequency Oscillator is turned off, 32.768 kHz oscillator running, selected low energy peripherals (RTC, LEUART, I2C, WDOG, ACMP and PCNT) are still available. RTC, Power-on Reset, Brown-out Detection and full RAM and CPU retention is also included.
  • EM3 (Stop Mode): 0.5 µA; Low-Frequency Oscillator is disabled, but there is still full CPU and RAM retention, as well as Power-on Reset, Pin reset, EM4 wake-up and Brown-out Detection. The low-power ACMP, asynchronous external interrupt, PCNT, and I2C can wake-up the device
  • EM4 (Shutoff Mode): 20nA; Pin reset, GPIO pin wake-up, GPIO pin retention and the PowerOn Reset are available. All pins are put into their reset state.


7.2 ADC

  • 3s 测一次,持续电流:3mA


7.3 LoRa

  • 1min 一个点,20dBm,无 EM,持续 4.73mA,峰值 138mA
  • 1min 一个点,20dBm,loop 中 EMU_EnterEM2(true) 后,持续 1.73mA,峰值 138mA
  • 1min 一个点,20dBm,loop 中 EMU_EnterEM2(true) 后,持续 1.73mA,加 spi_end() 无变化
  • 1min 一个点,20dBm,loop 中 EMU_EnterEM2(true) 后,持续 1.73mA,加 spi_end() + spi_pin 都拉低,无变化
  • 1min 一个点,20dBm,loop 中 EMU_EnterEM2(true) 后,持续 1.73mA,加 sx127x.setSleepMode(),电流变为 0.22mA
  • 1min 一个点,20dBm,loop 中 EMU_EnterEM2(true) 后,持续 1.73mA,加 sx127x.setSleepMode() + wire_end(),电流降低为 54.6 uA
  • 1min 一个点,20dBm,loop 中 EMU_EnterEM2(true) 后,持续 1.73mA,加 sx127x.setSleepMode() + wire_end() + dev_pwr_off(),sht2x 还有供电,电流低为 0.5 uA


7.4 Testing Note

  • 20191115, autoeco-p,90s interval,15h,0.148Wh (5V),0.00986667Wh/h;For 8000mAh@3.6V battery = 28.8 Wh, 28.8/0.00986667 = 2918.9h = 121.6days ...
  • 20191115 11:34 - 20191127 13:34, autoeco-th,20s interval,290h, 15.805Wh (5V), 0.0545Wh/h; For 8000mAh@3.6V battery = 28.8 Wh, 28.8/0.0545 = 528.4h = 22 days ...
  • 20191128 15:26 - , autoeco-th, 10s interval,


8 ADC

8.1 Overview

  • 1.25 V internal bandgap
  • 2.5 V internal bandgap
  • Vdd
  • 5 V internal differential bandgap
  • External single ended input from Ch 6
  • Differential input, 2x(Ch 6 - Ch 7)
  • The 2.5 V reference needs a supply voltage higher than 2.5 V
  • The differential 5 V reference needs a supply voltage higher than 2.75 V


8.2 Pin map

  • PIN14_PD7 ---> T2_J2_T ---> 1K ---> PIN17_PC14 (PRS_CH0,拉高作供电) ------- PIN13_PD6
  • PIN13_PD6 (ADC0_CH6),测供电电压
  • PIN14_PD7 (ADC0_CH7),测 Pt 对地电压(Pt 阻值)


8.3 Differential

adc.reference(INTERNAL3V3);

Serial.print("ADC differential ch6 ch7 read:");
Serial.println(adc.read(A6, A7));  /* Positive Ch6, negative Ch7. */
Serial.print("ADC6 = ");
Serial.println(adc.read(A6));
Serial.print("ADC7 = ");
Serial.println(adc.read(A7));

Result:

# A6 <--- I/O output HIGH
# A7 <--- pull up to Vbat

ADC differential ch6 ch7 read:1
ADC6 = 4091
ADC7 = 4090

##############################
# A6 <--- I/O output LOW
# A7 <--- pull up to Vbat

ADC differential ch6 ch7 read:-2048
ADC6 = 0
ADC7 = 4092

即:分辨率依然是 12bit,就是把参考电压分成 4096 份,差分的话就是上极限是 2047,下极限就是 -2048。

如上 A6 接高电位,A7 接低电位,差分输出为 1,参考电压 3.3V,则压降为 3.3/4096


T2:

# 开路
08-31 15:35:08:717]ADC differential ch6 ch7 read:0
[08-31 15:35:08:717]ADC6 = 4088
[08-31 15:35:08:717]ADC7 = 4087
[08-31 15:35:08:717]Vbat = 3.270
[08-31 15:35:10:707]ADC differential ch6 ch7 read:0
[08-31 15:35:10:707]ADC6 = 4088
[08-31 15:35:10:707]ADC7 = 4087
[08-31 15:35:10:722]Vbat = 3.276
[08-31 16:19:41:132]ADC differential ch6 ch7 read:-1
[08-31 16:19:41:132]ADC6 = 4086
[08-31 16:19:41:132]ADC7 = 4086
[08-31 16:19:41:146]Vbat = 3.272
[08-31 16:19:43:149]ADC differential ch6 ch7 read:-2
[08-31 16:19:43:149]ADC6 = 4086
[08-31 16:19:43:149]ADC7 = 4085
[08-31 16:19:43:149]Vbat = 3.274

# 短路:
[08-31 15:36:13:272]ADC differential ch6 ch7 read:2047
[08-31 15:36:13:272]ADC6 = 4007
[08-31 15:36:13:298]ADC7 = 0
[08-31 15:36:13:298]Vbat = 3.256
[08-31 15:36:15:287]ADC differential ch6 ch7 read:2047
[08-31 15:36:15:303]ADC6 = 4008
[08-31 15:36:15:303]ADC7 = 0
[08-31 15:36:15:303]Vbat = 3.257

重启、上电启动、状态不稳时,ADC 的可能有异常值(经确认,手拿导体接 T 口,会导致 a7 > a6,如 a7=4095 a6 = 4085,此即会使 Rt 值异常大。。。):

[08-31 15:46:55:636]PT1000 testing start...
[08-31 15:46:55:711]Rt = 4290872296
[08-31 15:46:55:711]time = 38
[08-31 15:46:55:711]Temperature = -276.0 'C
[08-31 15:46:58:722]Rt = 22445801
[08-31 15:46:58:722]time = 38
[08-31 15:46:58:722]Temperature = -276.0 'C


9 I2C


Examples:


Reference:


10 SPI


Examples:

#include "spidrv.h"

SPIDRV_HandleData_t handleData;
SPIDRV_Handle_t handle = &handleData;

void TransferComplete(SPIDRV_Handle_t handle, Ecode_t transferStatus, int itemsTransferred)
{
  if (transferStatus == ECODE_EMDRV_SPIDRV_OK)
  {
    // Success !
  }
}

int main()
{
  uint8_t buffer[10];
  SPIDRV_Init_t initData = SPIDRV_MASTER_USART1;

  // Initialize a SPI driver instance
  SPIDRV_Init(handle, &initData);

  // Transmit data using a blocking transmit function
  SPIDRV_MTransmitB(handle, buffer, 10);

  // Transmit data using a callback to catch transfer completion.
  SPIDRV_MTransmit(handle, buffer, 10, TransferComplete);
}


11 RTC DRV

Be careful of the callback function of rtcdrv timer:

 void(* RTCDRV_Callback_t) (RTCDRV_TimerID_t id, void *user)


The callback is called from within an interrupt handler with interrupts disabled! (这个函数是在 RTC_IRQHandler() 这个函数里被调用的。。。)

原 arduino_efm32 实现的 delay() 依赖系统时钟中断,RTCDRV 之 callback 函数里,该 delay 是没法使用的 (freeze了)


12 EMU Temperature

Used by the tempdrv driver in the emdrv/.

The TEMPDRV is using the EMU peripheral and not the ADC peripheral. The ADC contains another internal temperature sensor which is not touched by the TEMPDRV.

Refer to: NodeTao/examples/efm32/tempdrv


TEMPDRV gives the user a nice interface to the EMU internal temperature sensor which is present on the EFR32 and some EFM32 devices.

The TEMPDRV supports application specific callbacks at given temperature thresholds.

The EMU internal temperature sensor is running in EM0-EM4H and is capable of waking up the core on temperature change. The EMU temperature sensor is running continuously and measurements are taken every 250 ms.


This low power device only available in following mcu:

  • EFM32JG12B
  • EFM32JG1B
  • EFM32PG12B
  • EFM32PG1B


  • EFR32BG12P
  • EFR32BG13P
  • EFR32BG1B
  • EFR32BG1P
  • EFR32BG1V

......


13 Interrupt

NOTE: 中断处理函数中不可有太多消耗内存栈的操作(尤其 Serial.print() 这类字符输出函数调用),多次嵌套中断(比如用镊子触发FALLING)极其容易造成栈溢出。。。


13.1 Register

  • primask



13.2 API

Interrupts() and noInterrupts(): (本质都是直接设置 primask 这个寄存器)

/*
 * Enables IRQ interrupts by clearing the I-bit in the CPSR.
 * Can only be executed in Privileged modes.
 */
__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
{
  __ASM volatile ("cpsie i" : : : "memory");
}

/*
 * Disables IRQ interrupts by setting the I-bit in the CPSR.
 * Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
{
  __ASM volatile ("cpsid i" : : : "memory");
}

Suggest to use: (@ emlib/src/em_core.c or inc/em_core.h)

CORE_DECLARE_IRQ_STATE;
CORE_ENTER_CRITICAL();
your_code
CORE_EXIT_CRITICAL() ;

or:

CORE_DECLARE_IRQ_STATE;
CORE_ENTER_ATOMIC();
your_code
CORE_EXIT_ATOMIC();

CRITICAL section: Inside a critical sections all interrupts are

     disabled (except for fault handlers). The PRIMASK register is always used for
     interrupt disable/enable.

ATOMIC section: This type of section is configurable and the default

     method is to use PRIMASK. With BASEPRI configuration, interrupts with priority
     equal to or lower than a given configurable level are disabled. The interrupt
     disable priority level is defined at compile time. The BASEPRI register is not
     available for all architectures.

NVIC mask section: Disable NVIC (external interrupts) on an

     individual manner.


获取 primask 寄存器的值并保存之:

/*
 * Returns the current state of the priority mask bit from the Priority Mask Register.
 * Priority Mask value
 */
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
{
  uint32_t result;

  __ASM volatile ("MRS %0, primask" : "=r" (result) );
  return(result);
}

The exception mask register PRIMASK, that is used for priority boosting. PRIMASK is a special-purpose mask register.


13.3 Interrupt Vector

arch/efm32/sys/SiliconLabs/EFM32ZG/Source/GCC/startup_efm32zg.S:

    .section    .vectors
    .align      2
    .globl      __Vectors
__Vectors:
    .long       __StackTop            /* Top of Stack */
    .long       Reset_Handler         /* Reset Handler */
    .long       NMI_Handler           /* NMI Handler */
    .long       HardFault_Handler     /* Hard Fault Handler */
    .long       Default_Handler       /* Reserved */
    .long       Default_Handler       /* Reserved */
    .long       Default_Handler       /* Reserved */
    .long       Default_Handler       /* Reserved */
    .long       Default_Handler       /* Reserved */
    .long       Default_Handler       /* Reserved */
    .long       Default_Handler       /* Reserved */
    .long       SVC_Handler           /* SVCall Handler */
    .long       Default_Handler       /* Reserved */
    .long       Default_Handler       /* Reserved */
    .long       PendSV_Handler        /* PendSV Handler */
    .long       SysTick_Handler       /* SysTick Handler */

    /* External interrupts */
    .long       DMA_IRQHandler    /* 0 - DMA */
    .long       GPIO_EVEN_IRQHandler    /* 1 - GPIO_EVEN */
    .long       TIMER0_IRQHandler    /* 2 - TIMER0 */
    .long       ACMP0_IRQHandler    /* 3 - ACMP0 */
    .long       ADC0_IRQHandler    /* 4 - ADC0 */
    .long       I2C0_IRQHandler    /* 5 - I2C0 */
    .long       GPIO_ODD_IRQHandler    /* 6 - GPIO_ODD */
    .long       TIMER1_IRQHandler    /* 7 - TIMER1 */
    .long       USART1_RX_IRQHandler    /* 8 - USART1_RX */
    .long       USART1_TX_IRQHandler    /* 9 - USART1_TX */
    .long       LEUART0_IRQHandler    /* 10 - LEUART0 */
    .long       PCNT0_IRQHandler    /* 11 - PCNT0 */
    .long       RTC_IRQHandler    /* 12 - RTC */
    .long       CMU_IRQHandler    /* 13 - CMU */
    .long       VCMP_IRQHandler    /* 14 - VCMP */
    .long       MSC_IRQHandler    /* 15 - MSC */
    .long       AES_IRQHandler    /* 16 - AES */
    .long       Default_Handler    /* 17 - Reserved */
    .long       Default_Handler    /* 18 - Reserved */

    .size       __Vectors, . - __Vectors

    .text
    .thumb
    .thumb_func
    .align      2
    .globl      Reset_Handler
    .type       Reset_Handler, %function
Reset_Handler:
#ifndef __NO_SYSTEM_INIT
    ldr     r0, =SystemInit
    blx     r0
#endif

arch/efm32/sys/SiliconLabs/EFM32ZG/Source/GCC/startup_efm32zg.c:

const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
  /* Cortex-M Exception Handlers */
  (pFunc)&__StackTop,                       /*      Initial Stack Pointer     */
  Reset_Handler,                            /*      Reset Handler             */
  NMI_Handler,                              /*      NMI Handler               */
  HardFault_Handler,                        /*      Hard Fault Handler        */
  Default_Handler,                          /*      Reserved                  */
  Default_Handler,                          /*      Reserved                  */
  Default_Handler,                          /*      Reserved                  */
  Default_Handler,                          /*      Reserved                  */
  Default_Handler,                          /*      Reserved                  */
  Default_Handler,                          /*      Reserved                  */
  Default_Handler,                          /*      Reserved                  */
  SVC_Handler,                              /*      SVCall Handler            */
  Default_Handler,                          /*      Reserved                  */
  Default_Handler,                          /*      Reserved                  */
  PendSV_Handler,                           /*      PendSV Handler            */
  SysTick_Handler,                          /*      SysTick Handler           */

  /* External interrupts */
  DMA_IRQHandler,                       /*  0 - DMA       */
  GPIO_EVEN_IRQHandler,                       /*  1 - GPIO_EVEN       */
  TIMER0_IRQHandler,                       /*  2 - TIMER0       */
  ACMP0_IRQHandler,                       /*  3 - ACMP0       */
  ADC0_IRQHandler,                       /*  4 - ADC0       */
  I2C0_IRQHandler,                       /*  5 - I2C0       */
  GPIO_ODD_IRQHandler,                       /*  6 - GPIO_ODD       */
  TIMER1_IRQHandler,                       /*  7 - TIMER1       */
  USART1_RX_IRQHandler,                       /*  8 - USART1_RX       */
  USART1_TX_IRQHandler,                       /*  9 - USART1_TX       */
  LEUART0_IRQHandler,                       /*  10 - LEUART0       */
  PCNT0_IRQHandler,                       /*  11 - PCNT0       */
  RTC_IRQHandler,                       /*  12 - RTC       */
  CMU_IRQHandler,                       /*  13 - CMU       */
  VCMP_IRQHandler,                       /*  14 - VCMP       */
  MSC_IRQHandler,                       /*  15 - MSC       */
  AES_IRQHandler,                       /*  16 - AES       */
  Default_Handler,                          /*  17 - Reserved      */
  Default_Handler,                          /*  18 - Reserved      */
};

/*----------------------------------------------------------------------------
  Reset Handler called on controller reset
 *----------------------------------------------------------------------------*/
void Reset_Handler(void) {
......
......



13.4 SysTick Interrupt

Here is how we configure the SysTick interrupt so that it is enabled and running at 1ms interrupts:

SysTick_Config(CMU_ClockFreqGet(cmuClock_CORE) / 1000));


14 EF32ZG AES

128-bit key (54 HFCORECLK cycles)

Data, Key and IV 的地址必须 4 字节对齐,否则极其容易 hang ...

参考:NodeTao/examples/efm32/aes

#include "em_aes.h"

/*
 * Encrypt a plaintext message (32 bytes) using the AES CBC block cipher
 * mode with a 128 bits key and initial vector (iv) of 16 bytes
 *
*/
const uint8_t msg[32] __attribute__((aligned(4))) = {0x47, 0x4F, 0x33, 0x00, 0x00, 0x00, 0x02, 0xC5,
                            0x6E, 0x3B, 0xBA, 0x00, 0x8F, 0x0E, 0x29, 0x02,
                            0xE5, 0x75, 0x05, 0x15, 0x00, 0x41, 0x4D, 0x8C,
                            0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};

const uint8_t key[16] __attribute__((aligned(4))) = {0x64, 0x63, 0x47, 0x4F, 0x64, 0x63, 0x47, 0x4F,
                         0x64, 0x63, 0x47, 0x4F, 0x64, 0x63, 0x47, 0x4F};

const uint8_t iv[16] __attribute__((aligned(4))) = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
                        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F};

uint8_t e_msg[32] __attribute__((aligned(4))); /* Output buffer for encrypted data (ciphertext). */

uint8_t d_key[16] __attribute__((aligned(4)));

void setup()
{
    Serial.setRouteLoc(1);
    Serial.begin(115200);

    CMU_ClockEnable(cmuClock_AES, true);
}

void print_msg(uint8_t *pkt)
{
    for (int i = 0; i < 32; i++) {

        if (pkt[i] < 16)
            Serial.print("0");

        Serial.print(pkt[i], HEX);

        Serial.print(" ");
    }

    Serial.println("");
}

void loop()
{
    int start = 0, end = 0;

    Serial.println("Testing the AES Engine... ");

    start = millis();

    AES_CBC128(e_msg, msg, 32, key, iv, true);  /* true means encrypt. */

    end = millis();

    Serial.print("Encrypted 32 bytes spend: ");
    Serial.print(end - start);
    Serial.println("ms");

    Serial.println("The Encrypyted MSG:");
    print_msg(e_msg);

    AES_DecryptKey128(d_key, key);

    AES_CBC128(e_msg, e_msg, 32, d_key, iv, false);
    Serial.println("The Decrypyted MSG:");
    print_msg(e_msg);

    delay(6000);
}


15 User Data Flash

All members of the EFM32 family provide a single page of flash memory for storing "user" data.

It is located at address: 0x0FE0 0000 on all devices

Device		User Page Size(words)		User Page Size(bytes)
Gecko				128						512
Giant Gecko			1024					4096
Tiny Gecko			128						512
Wonder Gecko		512						2048
Leopard Gecko		512						2048
Zero Gecko			256						1024
Pearl Gecko			512						2048
Jade Gecko			512						2048


Examples:

#define USERDATA_BASE     (0x0FE00000UL) /**< User data page base address */
///////////////////////////////////////////////////
uint32_t *addr = (uint32_t *)0x0FE00000;
uint32_t data = 0x00EF3200;

MSC_Init();
MSC_ErasePage(addr);
MSC_WriteWord(addr, &data, sizeof(data));
MSC_Deinit();

写 main flash 和上面一样的代码,addr 可设为 0x7c00 (32K - 1K)


Refer to:


16 Reference





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