查看ESP32 RTC的源代码
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=== Undocumented === ==== rtc_pads_muxsel ==== Set the pad route to the digital IO_MUX (0) or RTC block (1) <source lang=bash> 0x4008d1a8 <rtc_pads_muxsel>: entry a1, 32 0x4008d1ab <rtc_pads_muxsel+3>: bbci a2, 0, 0x4008d1cc <rtc_pads_muxsel+36> 0x4008d1ae <rtc_pads_muxsel+6>: l32r a8, 0x4008c9b4 0x4008d1b1 <rtc_pads_muxsel+9>: l32r a9, 0x40084bc0 /* a9 = *(0x40084bc0) = 0xf7ffffff, BIT(27) */ 0x4008d1b4 <rtc_pads_muxsel+12>: memw 0x4008d1b7 <rtc_pads_muxsel+15>: l32i a11, a8, 0 0x4008d1ba <rtc_pads_muxsel+18>: extui a10, a3, 0, 1 0x4008d1bd <rtc_pads_muxsel+21>: slli a10, a10, 27 0x4008d1c0 <rtc_pads_muxsel+24>: and a9, a11, a9 0x4008d1c3 <rtc_pads_muxsel+27>: or a9, a10, a9 0x4008d1c6 <rtc_pads_muxsel+30>: memw 0x4008d1c9 <rtc_pads_muxsel+33>: s32i a9, a8, 0 0x4008d1cc <rtc_pads_muxsel+36>: bbci a2, 1, 0x4008d1ed <rtc_pads_muxsel+69> 0x4008d1cf <rtc_pads_muxsel+39>: l32r a8, 0x4008c9b4 0x4008d1d2 <rtc_pads_muxsel+42>: l32r a9, 0x4008bebc 0x4008d1d5 <rtc_pads_muxsel+45>: memw 0x4008d1d8 <rtc_pads_muxsel+48>: l32i a11, a8, 0 0x4008d1db <rtc_pads_muxsel+51>: extui a10, a3, 0, 1 0x4008d1de <rtc_pads_muxsel+54>: slli a10, a10, 26 0x4008d1e1 <rtc_pads_muxsel+57>: and a9, a11, a9 0x4008d1e4 <rtc_pads_muxsel+60>: or a9, a10, a9 0x4008d1e7 <rtc_pads_muxsel+63>: memw 0x4008d1ea <rtc_pads_muxsel+66>: s32i a9, a8, 0 0x4008d1ed <rtc_pads_muxsel+69>: bbci a2, 2, 0x4008d20d <rtc_pads_muxsel+101> 0x4008d1f0 <rtc_pads_muxsel+72>: l32r a8, 0x4008c9b4 0x4008d1f3 <rtc_pads_muxsel+75>: l32r a9, 0x40085f20 0x4008d1f6 <rtc_pads_muxsel+78>: memw 0x4008d1f9 <rtc_pads_muxsel+81>: l32i.n a11, a8, 0 0x4008d1fb <rtc_pads_muxsel+83>: extui a10, a3, 0, 1 0x4008d1fe <rtc_pads_muxsel+86>: slli a10, a10, 25 0x4008d201 <rtc_pads_muxsel+89>: and a9, a11, a9 0x4008d204 <rtc_pads_muxsel+92>: or a9, a10, a9 0x4008d207 <rtc_pads_muxsel+95>: memw 0x4008d20a <rtc_pads_muxsel+98>: s32i a9, a8, 0 0x4008d20d <rtc_pads_muxsel+101>: bbci a2, 3, 0x4008d22d <rtc_pads_muxsel+133> 0x4008d210 <rtc_pads_muxsel+104>: l32r a8, 0x4008c9b4 0x4008d213 <rtc_pads_muxsel+107>: l32r a9, 0x4008beb4 0x4008d216 <rtc_pads_muxsel+110>: memw 0x4008d219 <rtc_pads_muxsel+113>: l32i.n a11, a8, 0 0x4008d21b <rtc_pads_muxsel+115>: extui a10, a3, 0, 1 0x4008d21e <rtc_pads_muxsel+118>: slli a10, a10, 24 0x4008d221 <rtc_pads_muxsel+121>: and a9, a11, a9 0x4008d224 <rtc_pads_muxsel+124>: or a9, a10, a9 0x4008d227 <rtc_pads_muxsel+127>: memw 0x4008d22a <rtc_pads_muxsel+130>: s32i a9, a8, 0 0x4008d22d <rtc_pads_muxsel+133>: bbci a2, 4, 0x4008d24d <rtc_pads_muxsel+165> 0x4008d230 <rtc_pads_muxsel+136>: l32r a8, 0x4008c9c8 0x4008d233 <rtc_pads_muxsel+139>: l32r a9, 0x4008620c 0x4008d236 <rtc_pads_muxsel+142>: memw 0x4008d239 <rtc_pads_muxsel+145>: l32i.n a11, a8, 0 0x4008d23b <rtc_pads_muxsel+147>: extui a10, a3, 0, 1 0x4008d23e <rtc_pads_muxsel+150>: slli a10, a10, 29 0x4008d241 <rtc_pads_muxsel+153>: and a9, a11, a9 0x4008d244 <rtc_pads_muxsel+156>: or a9, a10, a9 0x4008d247 <rtc_pads_muxsel+159>: memw 0x4008d24a <rtc_pads_muxsel+162>: s32i a9, a8, 0 0x4008d24d <rtc_pads_muxsel+165>: bbci a2, 5, 0x4008d26d <rtc_pads_muxsel+197> 0x4008d250 <rtc_pads_muxsel+168>: l32r a8, 0x4008c9c8 0x4008d253 <rtc_pads_muxsel+171>: l32r a9, 0x40087110 0x4008d256 <rtc_pads_muxsel+174>: memw 0x4008d259 <rtc_pads_muxsel+177>: l32i.n a11, a8, 0 0x4008d25b <rtc_pads_muxsel+179>: extui a10, a3, 0, 1 0x4008d25e <rtc_pads_muxsel+182>: slli a10, a10, 28 0x4008d261 <rtc_pads_muxsel+185>: and a9, a11, a9 0x4008d264 <rtc_pads_muxsel+188>: or a9, a10, a9 0x4008d267 <rtc_pads_muxsel+191>: memw 0x4008d26a <rtc_pads_muxsel+194>: s32i a9, a8, 0 0x4008d26d <rtc_pads_muxsel+197>: bbci a2, 6, 0x4008d28d <rtc_pads_muxsel+229> 0x4008d270 <rtc_pads_muxsel+200>: l32r a8, 0x4008bfa4 0x4008d273 <rtc_pads_muxsel+203>: l32r a9, 0x400854d4 0x4008d276 <rtc_pads_muxsel+206>: memw 0x4008d279 <rtc_pads_muxsel+209>: l32i.n a11, a8, 0 0x4008d27b <rtc_pads_muxsel+211>: extui a10, a3, 0, 1 0x4008d27e <rtc_pads_muxsel+214>: slli a10, a10, 17 0x4008d281 <rtc_pads_muxsel+217>: and a9, a11, a9 0x4008d284 <rtc_pads_muxsel+220>: or a9, a10, a9 0x4008d287 <rtc_pads_muxsel+223>: memw 0x4008d28a <rtc_pads_muxsel+226>: s32i a9, a8, 0 0x4008d28d <rtc_pads_muxsel+229>: bbci a2, 7, 0x4008d2ad <rtc_pads_muxsel+261> 0x4008d290 <rtc_pads_muxsel+232>: l32r a8, 0x4008bfb0 ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * set == 0, route to digital IO_MUX * set == 1, route to RTC block */ void rtc_pads_muxsel(rtc_gpio_num_t rtc_gpio_num, uint8_t sel); </source> <br> ==== rtc_pads_funsel ==== Select the RTC function for this pad. <source lang=bash> 0x4008d400 <rtc_pads_funsel>: entry a1, 32 0x4008d403 <rtc_pads_funsel+3>: bbci a2, 0, 0x4008d424 <rtc_pads_funsel+36> 0x4008d406 <rtc_pads_funsel+6>: l32r a8, 0x4008c9b4 0x4008d409 <rtc_pads_funsel+9>: l32r a9, 0x4008bfac 0x4008d40c <rtc_pads_funsel+12>: memw 0x4008d40f <rtc_pads_funsel+15>: l32i a11, a8, 0 0x4008d412 <rtc_pads_funsel+18>: extui a10, a3, 0, 2 0x4008d415 <rtc_pads_funsel+21>: slli a10, a10, 22 0x4008d418 <rtc_pads_funsel+24>: and a9, a11, a9 0x4008d41b <rtc_pads_funsel+27>: or a9, a10, a9 0x4008d41e <rtc_pads_funsel+30>: memw 0x4008d421 <rtc_pads_funsel+33>: s32i a9, a8, 0 0x4008d424 <rtc_pads_funsel+36>: bbci a2, 1, 0x4008d445 <rtc_pads_funsel+69> 0x4008d427 <rtc_pads_funsel+39>: l32r a8, 0x4008c9b4 0x4008d42a <rtc_pads_funsel+42>: l32r a9, 0x4008d3f0 0x4008d42d <rtc_pads_funsel+45>: memw 0x4008d430 <rtc_pads_funsel+48>: l32i a11, a8, 0 0x4008d433 <rtc_pads_funsel+51>: extui a10, a3, 0, 2 0x4008d436 <rtc_pads_funsel+54>: slli a10, a10, 17 0x4008d439 <rtc_pads_funsel+57>: and a9, a11, a9 0x4008d43c <rtc_pads_funsel+60>: or a9, a10, a9 0x4008d43f <rtc_pads_funsel+63>: memw 0x4008d442 <rtc_pads_funsel+66>: s32i a9, a8, 0 0x4008d445 <rtc_pads_funsel+69>: bbci a2, 2, 0x4008d465 <rtc_pads_funsel+101> 0x4008d448 <rtc_pads_funsel+72>: l32r a8, 0x4008c9b4 0x4008d44b <rtc_pads_funsel+75>: l32r a9, 0x4008c274 0x4008d44e <rtc_pads_funsel+78>: memw 0x4008d451 <rtc_pads_funsel+81>: l32i.n a11, a8, 0 0x4008d453 <rtc_pads_funsel+83>: extui a10, a3, 0, 2 0x4008d456 <rtc_pads_funsel+86>: slli a10, a10, 12 0x4008d459 <rtc_pads_funsel+89>: and a9, a11, a9 0x4008d45c <rtc_pads_funsel+92>: or a9, a10, a9 0x4008d45f <rtc_pads_funsel+95>: memw 0x4008d462 <rtc_pads_funsel+98>: s32i a9, a8, 0 0x4008d465 <rtc_pads_funsel+101>: bbci a2, 3, 0x4008d485 <rtc_pads_funsel+133> 0x4008d468 <rtc_pads_funsel+104>: l32r a8, 0x4008c9b4 0x4008d46b <rtc_pads_funsel+107>: extui a10, a3, 0, 2 0x4008d46e <rtc_pads_funsel+110>: memw 0x4008d471 <rtc_pads_funsel+113>: l32i.n a11, a8, 0 0x4008d473 <rtc_pads_funsel+115>: movi a9, 0xfffffe7f 0x4008d476 <rtc_pads_funsel+118>: slli a10, a10, 7 0x4008d479 <rtc_pads_funsel+121>: and a9, a11, a9 0x4008d47c <rtc_pads_funsel+124>: or a9, a10, a9 0x4008d47f <rtc_pads_funsel+127>: memw 0x4008d482 <rtc_pads_funsel+130>: s32i a9, a8, 0 0x4008d485 <rtc_pads_funsel+133>: bbci a2, 4, 0x4008d4a5 <rtc_pads_funsel+165> 0x4008d488 <rtc_pads_funsel+136>: l32r a8, 0x4008c9c8 ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * sel == 0, select the function 0 of rtc * sel == 1, select the function 1 of rtc * sel == 2, select the function 2 of rtc * sel == 3, select the function 3 of rtc */ void rtc_pads_funsel(rtc_gpio_num_t rtc_gpio_num, uint8_t sel); </source> <br> ==== rtc_pads_slpsel ==== Sleep mode selection signal of the pad, Set to 1 to put the pad in sleep mode <source lang=bash> 0x4008d648 <rtc_pads_slpsel>: entry a1, 32 0x4008d64b <rtc_pads_slpsel+3>: bbci a2, 0, 0x4008d66c <rtc_pads_slpsel+36> 0x4008d64e <rtc_pads_slpsel+6>: l32r a8, 0x4008c9b4 0x4008d651 <rtc_pads_slpsel+9>: l32r a9, 0x4008add4 0x4008d654 <rtc_pads_slpsel+12>: memw 0x4008d657 <rtc_pads_slpsel+15>: l32i a11, a8, 0 0x4008d65a <rtc_pads_slpsel+18>: extui a10, a3, 0, 1 0x4008d65d <rtc_pads_slpsel+21>: slli a10, a10, 21 0x4008d660 <rtc_pads_slpsel+24>: and a9, a11, a9 0x4008d663 <rtc_pads_slpsel+27>: or a9, a10, a9 0x4008d666 <rtc_pads_slpsel+30>: memw 0x4008d669 <rtc_pads_slpsel+33>: s32i a9, a8, 0 0x4008d66c <rtc_pads_slpsel+36>: bbci a2, 1, 0x4008d68d <rtc_pads_slpsel+69> 0x4008d66f <rtc_pads_slpsel+39>: l32r a8, 0x4008c9b4 0x4008d672 <rtc_pads_slpsel+42>: l32r a9, 0x4008bf98 0x4008d675 <rtc_pads_slpsel+45>: memw 0x4008d678 <rtc_pads_slpsel+48>: l32i a11, a8, 0 0x4008d67b <rtc_pads_slpsel+51>: extui a10, a3, 0, 1 0x4008d67e <rtc_pads_slpsel+54>: slli a10, a10, 16 0x4008d681 <rtc_pads_slpsel+57>: and a9, a11, a9 0x4008d684 <rtc_pads_slpsel+60>: or a9, a10, a9 0x4008d687 <rtc_pads_slpsel+63>: memw 0x4008d68a <rtc_pads_slpsel+66>: s32i a9, a8, 0 0x4008d68d <rtc_pads_slpsel+69>: bbci a2, 2, 0x4008d6ad <rtc_pads_slpsel+101> 0x4008d690 <rtc_pads_slpsel+72>: l32r a8, 0x4008c9b4 0x4008d693 <rtc_pads_slpsel+75>: l32r a9, 0x400888dc 0x4008d696 <rtc_pads_slpsel+78>: memw 0x4008d699 <rtc_pads_slpsel+81>: l32i.n a11, a8, 0 0x4008d69b <rtc_pads_slpsel+83>: extui a10, a3, 0, 1 0x4008d69e <rtc_pads_slpsel+86>: slli a10, a10, 11 0x4008d6a1 <rtc_pads_slpsel+89>: and a9, a11, a9 0x4008d6a4 <rtc_pads_slpsel+92>: or a9, a10, a9 0x4008d6a7 <rtc_pads_slpsel+95>: memw 0x4008d6aa <rtc_pads_slpsel+98>: s32i a9, a8, 0 0x4008d6ad <rtc_pads_slpsel+101>: bbci a2, 3, 0x4008d6cd <rtc_pads_slpsel+133> 0x4008d6b0 <rtc_pads_slpsel+104>: l32r a8, 0x4008c9b4 ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * sel == 1, put the pad in sleep mode */ void rtc_pads_slpsel(rtc_gpio_num_t rtc_gpio_num, uint8_t sel); </source> <br> ==== rtc_pads_slpie ==== <source lang=bash> 0x4008da1c <rtc_pads_slpie>: entry a1, 32 0x4008da1f <rtc_pads_slpie+3>: bbci a2, 6, 0x4008da40 <rtc_pads_slpie+36> 0x4008da22 <rtc_pads_slpie+6>: l32r a8, 0x4008bfa4 0x4008da25 <rtc_pads_slpie+9>: l32r a9, 0x4008da18 0x4008da28 <rtc_pads_slpie+12>: memw 0x4008da2b <rtc_pads_slpie+15>: l32i a11, a8, 0 0x4008da2e <rtc_pads_slpie+18>: extui a10, a3, 0, 1 0x4008da31 <rtc_pads_slpie+21>: slli a10, a10, 13 0x4008da34 <rtc_pads_slpie+24>: and a9, a11, a9 0x4008da37 <rtc_pads_slpie+27>: or a9, a10, a9 0x4008da3a <rtc_pads_slpie+30>: memw 0x4008da3d <rtc_pads_slpie+33>: s32i a9, a8, 0 0x4008da40 <rtc_pads_slpie+36>: bbci a2, 7, 0x4008da61 <rtc_pads_slpie+69> 0x4008da43 <rtc_pads_slpie+39>: l32r a8, 0x4008bfb0 0x4008da46 <rtc_pads_slpie+42>: l32r a9, 0x4008da18 0x4008da49 <rtc_pads_slpie+45>: memw 0x4008da4c <rtc_pads_slpie+48>: l32i a11, a8, 0 0x4008da4f <rtc_pads_slpie+51>: extui a10, a3, 0, 1 0x4008da52 <rtc_pads_slpie+54>: slli a10, a10, 13 0x4008da55 <rtc_pads_slpie+57>: and a9, a11, a9 0x4008da58 <rtc_pads_slpie+60>: or a9, a10, a9 0x4008da5b <rtc_pads_slpie+63>: memw 0x4008da5e <rtc_pads_slpie+66>: s32i a9, a8, 0 0x4008da61 <rtc_pads_slpie+69>: bbci a2, 8, 0x4008da81 <rtc_pads_slpie+101> 0x4008da64 <rtc_pads_slpie+72>: l32r a8, 0x4008c9bc 0x4008da67 <rtc_pads_slpie+75>: l32r a9, 0x4008da18 0x4008da6a <rtc_pads_slpie+78>: memw 0x4008da6d <rtc_pads_slpie+81>: l32i.n a11, a8, 0 0x4008da6f <rtc_pads_slpie+83>: extui a10, a3, 0, 1 0x4008da72 <rtc_pads_slpie+86>: slli a10, a10, 13 0x4008da75 <rtc_pads_slpie+89>: and a9, a11, a9 0x4008da78 <rtc_pads_slpie+92>: or a9, a10, a9 0x4008da7b <rtc_pads_slpie+95>: memw 0x4008da7e <rtc_pads_slpie+98>: s32i a9, a8, 0 0x4008da81 <rtc_pads_slpie+101>: bbci a2, 9, 0x4008daa1 <rtc_pads_slpie+133> 0x4008da84 <rtc_pads_slpie+104>: l32r a8, 0x4008c9bc ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * sel == 1, put the pad in sleep mode * * Only valide for RTC_GPIO6 - RTC_GPIO17 */ void rtc_pads_slpie(rtc_gpio_num_t rtc_gpio_num, uint8_t enable); </source> <br> ==== rtc_pads_funie ==== Input enable of the pad. <source lang=bash> 0x4008dba4 <rtc_pads_funie>: entry a1, 32 0x4008dba7 <rtc_pads_funie+3>: bbci a2, 6, 0x4008dbc8 <rtc_pads_funie+36> 0x4008dbaa <rtc_pads_funie+6>: l32r a8, 0x4008bfa4 0x4008dbad <rtc_pads_funie+9>: l32r a9, 0x400888dc 0x4008dbb0 <rtc_pads_funie+12>: memw 0x4008dbb3 <rtc_pads_funie+15>: l32i a11, a8, 0 0x4008dbb6 <rtc_pads_funie+18>: extui a10, a3, 0, 1 0x4008dbb9 <rtc_pads_funie+21>: slli a10, a10, 11 0x4008dbbc <rtc_pads_funie+24>: and a9, a11, a9 0x4008dbbf <rtc_pads_funie+27>: or a9, a10, a9 0x4008dbc2 <rtc_pads_funie+30>: memw 0x4008dbc5 <rtc_pads_funie+33>: s32i a9, a8, 0 0x4008dbc8 <rtc_pads_funie+36>: bbci a2, 7, 0x4008dbe9 <rtc_pads_funie+69> 0x4008dbcb <rtc_pads_funie+39>: l32r a8, 0x4008bfb0 0x4008dbce <rtc_pads_funie+42>: l32r a9, 0x400888dc 0x4008dbd1 <rtc_pads_funie+45>: memw 0x4008dbd4 <rtc_pads_funie+48>: l32i a11, a8, 0 0x4008dbd7 <rtc_pads_funie+51>: extui a10, a3, 0, 1 0x4008dbda <rtc_pads_funie+54>: slli a10, a10, 11 0x4008dbdd <rtc_pads_funie+57>: and a9, a11, a9 0x4008dbe0 <rtc_pads_funie+60>: or a9, a10, a9 0x4008dbe3 <rtc_pads_funie+63>: memw 0x4008dbe6 <rtc_pads_funie+66>: s32i a9, a8, 0 0x4008dbe9 <rtc_pads_funie+69>: bbci a2, 8, 0x4008dc09 <rtc_pads_funie+101> 0x4008dbec <rtc_pads_funie+72>: l32r a8, 0x4008c9bc ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * enable == 1, input enable * enable == 0, input disable * * Only the RTC_GPIO6 - RTC_GPIO17 are valide */ void rtc_pads_funie (rtc_gpio_num_t rtc_gpio_num, uint8_t enable); </source> <br> ==== rtc_pads_slpoe ==== Output enable of the pad. <source lang=bash> 0x4008d890 <rtc_pads_slpoe>: entry a1, 32 0x4008d893 <rtc_pads_slpoe+3>: bbci a2, 6, 0x4008d8b4 <rtc_pads_slpoe+36> 0x4008d896 <rtc_pads_slpoe+6>: l32r a8, 0x4008bfa4 0x4008d899 <rtc_pads_slpoe+9>: l32r a9, 0x40087114 0x4008d89c <rtc_pads_slpoe+12>: memw 0x4008d89f <rtc_pads_slpoe+15>: l32i a11, a8, 0 0x4008d8a2 <rtc_pads_slpoe+18>: extui a10, a3, 0, 1 0x4008d8a5 <rtc_pads_slpoe+21>: slli a10, a10, 12 0x4008d8a8 <rtc_pads_slpoe+24>: and a9, a11, a9 0x4008d8ab <rtc_pads_slpoe+27>: or a9, a10, a9 0x4008d8ae <rtc_pads_slpoe+30>: memw 0x4008d8b1 <rtc_pads_slpoe+33>: s32i a9, a8, 0 0x4008d8b4 <rtc_pads_slpoe+36>: bbci a2, 7, 0x4008d8d5 <rtc_pads_slpoe+69> 0x4008d8b7 <rtc_pads_slpoe+39>: l32r a8, 0x4008bfb0 0x4008d8ba <rtc_pads_slpoe+42>: l32r a9, 0x40087114 0x4008d8bd <rtc_pads_slpoe+45>: memw 0x4008d8c0 <rtc_pads_slpoe+48>: l32i a11, a8, 0 0x4008d8c3 <rtc_pads_slpoe+51>: extui a10, a3, 0, 1 0x4008d8c6 <rtc_pads_slpoe+54>: slli a10, a10, 12 0x4008d8c9 <rtc_pads_slpoe+57>: and a9, a11, a9 0x4008d8cc <rtc_pads_slpoe+60>: or a9, a10, a9 0x4008d8cf <rtc_pads_slpoe+63>: memw 0x4008d8d2 <rtc_pads_slpoe+66>: s32i a9, a8, 0 0x4008d8d5 <rtc_pads_slpoe+69>: bbci a2, 8, 0x4008d8f5 <rtc_pads_slpoe+101> 0x4008d8d8 <rtc_pads_slpoe+72>: l32r a8, 0x4008c9bc ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * enable == 1, Output enable * enable == 0, Output disable * Only RTC_GPIO6 - RTC_GPIO17 are valide */ void rtc_pads_slpoe(rtc_gpio_num_t rtc_gpio_num, uint8_t enable); </source> <br> ==== rtc_pads_hold ==== <source lang=bash> 0x4008e03c <rtc_pads_hold>: entry a1, 32 0x4008e03f <rtc_pads_hold+3>: bbci a2, 6, 0x4008e060 <rtc_pads_hold+36> 0x4008e042 <rtc_pads_hold+6>: l32r a8, 0x4008bfa4 0x4008e045 <rtc_pads_hold+9>: l32r a9, 0x4008620c 0x4008e048 <rtc_pads_hold+12>: memw 0x4008e04b <rtc_pads_hold+15>: l32i a11, a8, 0 0x4008e04e <rtc_pads_hold+18>: extui a10, a3, 0, 1 0x4008e051 <rtc_pads_hold+21>: slli a10, a10, 29 0x4008e054 <rtc_pads_hold+24>: and a9, a11, a9 0x4008e057 <rtc_pads_hold+27>: or a9, a10, a9 0x4008e05a <rtc_pads_hold+30>: memw 0x4008e05d <rtc_pads_hold+33>: s32i a9, a8, 0 0x4008e060 <rtc_pads_hold+36>: bbci a2, 7, 0x4008e081 <rtc_pads_hold+69> 0x4008e063 <rtc_pads_hold+39>: l32r a8, 0x4008bfb0 0x4008e066 <rtc_pads_hold+42>: l32r a9, 0x4008620c 0x4008e069 <rtc_pads_hold+45>: memw 0x4008e06c <rtc_pads_hold+48>: l32i a11, a8, 0 0x4008e06f <rtc_pads_hold+51>: extui a10, a3, 0, 1 0x4008e072 <rtc_pads_hold+54>: slli a10, a10, 29 0x4008e075 <rtc_pads_hold+57>: and a9, a11, a9 0x4008e078 <rtc_pads_hold+60>: or a9, a10, a9 0x4008e07b <rtc_pads_hold+63>: memw 0x4008e07e <rtc_pads_hold+66>: s32i a9, a8, 0 0x4008e081 <rtc_pads_hold+69>: bbci a2, 8, 0x4008e0a1 <rtc_pads_hold+101> 0x4008e084 <rtc_pads_hold+72>: l32r a8, 0x4008c9bc 0x4008e087 <rtc_pads_hold+75>: l32r a9, 0x4008620c ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * hold == 1, Hold output value * hold == 0, normal operation * Only RTC_GPIO6 - RTC_GPIO17 are valide */ void rtc_pads_hold(rtc_gpio_num_t rtc_gpio_num, uint8_t hold); </source> <br> ==== rtc_pads_pu ==== <source lang=bash> 0x4008dd2c <rtc_pads_pu>: entry a1, 32 0x4008dd2f <rtc_pads_pu+3>: bbci a2, 6, 0x4008dd50 <rtc_pads_pu+36> 0x4008dd32 <rtc_pads_pu+6>: l32r a8, 0x4008bfa4 0x4008dd35 <rtc_pads_pu+9>: l32r a9, 0x40084bc0 0x4008dd38 <rtc_pads_pu+12>: memw 0x4008dd3b <rtc_pads_pu+15>: l32i a11, a8, 0 0x4008dd3e <rtc_pads_pu+18>: extui a10, a3, 0, 1 0x4008dd41 <rtc_pads_pu+21>: slli a10, a10, 27 0x4008dd44 <rtc_pads_pu+24>: and a9, a11, a9 0x4008dd47 <rtc_pads_pu+27>: or a9, a10, a9 0x4008dd4a <rtc_pads_pu+30>: memw 0x4008dd4d <rtc_pads_pu+33>: s32i a9, a8, 0 0x4008dd50 <rtc_pads_pu+36>: bbci a2, 7, 0x4008dd71 <rtc_pads_pu+69> 0x4008dd53 <rtc_pads_pu+39>: l32r a8, 0x4008bfb0 0x4008dd56 <rtc_pads_pu+42>: l32r a9, 0x40084bc0 0x4008dd59 <rtc_pads_pu+45>: memw 0x4008dd5c <rtc_pads_pu+48>: l32i a11, a8, 0 0x4008dd5f <rtc_pads_pu+51>: extui a10, a3, 0, 1 0x4008dd62 <rtc_pads_pu+54>: slli a10, a10, 27 0x4008dd65 <rtc_pads_pu+57>: and a9, a11, a9 0x4008dd68 <rtc_pads_pu+60>: or a9, a10, a9 0x4008dd6b <rtc_pads_pu+63>: memw 0x4008dd6e <rtc_pads_pu+66>: s32i a9, a8, 0 0x4008dd71 <rtc_pads_pu+69>: bbci a2, 8, 0x4008dd91 <rtc_pads_pu+101> 0x4008dd74 <rtc_pads_pu+72>: l32r a8, 0x4008c9bc 0x4008dd77 <rtc_pads_pu+75>: l32r a9, 0x40084bc0 ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * pu == 1, pull-up enable * pu == 0, pull-up disable * Only RTC_GPIO6 - RTC_GPIO17 are valide */ void rtc_pads_pu(rtc_gpio_num_t rtc_gpio_num, uint8_t pu); </source> <br> ==== rtc_pads_pd ==== <source lang=bash> 0x4008deb4 <rtc_pads_pd>: entry a1, 32 0x4008deb7 <rtc_pads_pd+3>: bbci a2, 6, 0x4008ded8 <rtc_pads_pd+36> 0x4008deba <rtc_pads_pd+6>: l32r a8, 0x4008bfa4 0x4008debd <rtc_pads_pd+9>: l32r a9, 0x40087110 0x4008dec0 <rtc_pads_pd+12>: memw 0x4008dec3 <rtc_pads_pd+15>: l32i a11, a8, 0 0x4008dec6 <rtc_pads_pd+18>: extui a10, a3, 0, 1 0x4008dec9 <rtc_pads_pd+21>: slli a10, a10, 28 0x4008decc <rtc_pads_pd+24>: and a9, a11, a9 0x4008decf <rtc_pads_pd+27>: or a9, a10, a9 0x4008ded2 <rtc_pads_pd+30>: memw 0x4008ded5 <rtc_pads_pd+33>: s32i a9, a8, 0 0x4008ded8 <rtc_pads_pd+36>: bbci a2, 7, 0x4008def9 <rtc_pads_pd+69> 0x4008dedb <rtc_pads_pd+39>: l32r a8, 0x4008bfb0 0x4008dede <rtc_pads_pd+42>: l32r a9, 0x40087110 0x4008dee1 <rtc_pads_pd+45>: memw 0x4008dee4 <rtc_pads_pd+48>: l32i a11, a8, 0 0x4008dee7 <rtc_pads_pd+51>: extui a10, a3, 0, 1 0x4008deea <rtc_pads_pd+54>: slli a10, a10, 28 0x4008deed <rtc_pads_pd+57>: and a9, a11, a9 0x4008def0 <rtc_pads_pd+60>: or a9, a10, a9 0x4008def3 <rtc_pads_pd+63>: memw 0x4008def6 <rtc_pads_pd+66>: s32i a9, a8, 0 0x4008def9 <rtc_pads_pd+69>: bbci a2, 8, 0x4008df19 <rtc_pads_pd+101> 0x4008defc <rtc_pads_pd+72>: l32r a8, 0x4008c9bc 0x4008deff <rtc_pads_pd+75>: l32r a9, 0x40087110 ...... ...... </source> <source lang=cpp> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * pd == 1, pull-down enable * pd == 0, pull-down disable * Only RTC_GPIO6 - RTC_GPIO17 are valide */ void rtc_pads_pd(rtc_gpio_num_t rtc_gpio_num, uint8_t pd); </source> <br> ==== rtc_set_wakeup_opt ==== <source lang=bash> 0x4008ff8c <rtc_set_wakeup_opt>: entry a1, 32 0x4008ff8f <rtc_set_wakeup_opt+3>: l32r a8, 0x4008ff84 <-- load the address of RTC_CNTL_WAKEUP_STATE_REG 0x4008ff92 <rtc_set_wakeup_opt+6>: l32r a11, 0x4008d188 <-- a11 = 0xffc007ff 0x4008ff95 <rtc_set_wakeup_opt+9>: memw 0x4008ff98 <rtc_set_wakeup_opt+12>: l32i.n a9, a8, 0 <-- Read the RTC_CNTL_WAKEUP_STATE_REG 0x4008ff9a <rtc_set_wakeup_opt+14>: extui a2, a2, 0, 11 <-- Extract the low 11 bits of 1st parameter 0x4008ff9d <rtc_set_wakeup_opt+17>: slli a10, a2, 11 <-- Shift left 11 0x4008ffa0 <rtc_set_wakeup_opt+20>: and a9, a9, a11 <-- RTC_CNTL_WAKEUP_STATE_REG & 0xffc007ff (only bitpos:[21:11]) 0x4008ffa3 <rtc_set_wakeup_opt+23>: or a9, a10, a9 <-- (RTC_CNTL_WAKEUP_STATE_REG & 0xffc007ff) | wakeup_opt 0x4008ffa6 <rtc_set_wakeup_opt+26>: memw 0x4008ffa9 <rtc_set_wakeup_opt+29>: s32i.n a9, a8, 0 <-- Write to RTC_CNTL_WAKEUP_STATE_REG 0x4008ffab <rtc_set_wakeup_opt+31>: l32r a8, 0x4008ff88 <--- load the address of RTC_CNTL_SLP_REJECT_CONF_REG 0x4008ffae <rtc_set_wakeup_opt+34>: memw 0x4008ffb1 <rtc_set_wakeup_opt+37>: s32i.n a3, a8, 0 <-- store the 2nd parameter into RTC_CNTL_SLP_REJECT_CONF_REG directly 0x4008ffb3 <rtc_set_wakeup_opt+39>: retw.n (gdb) x /1x 0x4008ff84 0x4008ff84: 0x3ff48038 (gdb) x /1x 0x4008d188 0x4008d188: 0xffc007ff (gdb) x /1x 0x4008ff88 0x4008ff88: 0x3ff48064 #define DR_REG_RTCCNTL_BASE 0x3ff48000 #define RTC_CNTL_SLP_REJECT_CONF_REG (DR_REG_RTCCNTL_BASE + 0x64) #define RTC_CNTL_WAKEUP_STATE_REG (DR_REG_RTCCNTL_BASE + 0x38) /* RTC_CNTL_GPIO_WAKEUP_FILTER : R/W ;bitpos:[22] ;default: 1'd0 ; */ /*description: enable filter for gpio wakeup event*/ #define RTC_CNTL_GPIO_WAKEUP_FILTER (BIT(22)) #define RTC_CNTL_GPIO_WAKEUP_FILTER_M (BIT(22)) #define RTC_CNTL_GPIO_WAKEUP_FILTER_V 0x1 #define RTC_CNTL_GPIO_WAKEUP_FILTER_S 22 /* RTC_CNTL_WAKEUP_ENA : R/W ;bitpos:[21:11] ;default: 11'b1100 ; */ /*description: wakeup enable bitmap*/ #define RTC_CNTL_WAKEUP_ENA 0x000007FF #define RTC_CNTL_WAKEUP_ENA_M ((RTC_CNTL_WAKEUP_ENA_V)<<(RTC_CNTL_WAKEUP_ENA_S)) #define RTC_CNTL_WAKEUP_ENA_V 0x7FF #define RTC_CNTL_WAKEUP_ENA_S 11 /* RTC_CNTL_WAKEUP_CAUSE : RO ;bitpos:[10:0] ;default: 11'h0 ; */ /*description: wakeup cause*/ #define RTC_CNTL_WAKEUP_CAUSE 0x000007FF #define RTC_CNTL_WAKEUP_CAUSE_M ((RTC_CNTL_WAKEUP_CAUSE_V)<<(RTC_CNTL_WAKEUP_CAUSE_S)) #define RTC_CNTL_WAKEUP_CAUSE_V 0x7FF #define RTC_CNTL_WAKEUP_CAUSE_S 0 </source> >>> So the rtc_set_wakeup_opt should be: void rtc_set_wakeup_opt(uint32_t wakeup_opt, uint32_t sleep_reject_conf); <br> ==== rtc_pad_ext_wakeup ==== Following: * p1 is the 1st parameter of rtc_pad_ext_wakeup * p2 is the 2nd parameter of rtc_pad_ext_wakeup * p3 is the 3rd parameter of rtc_pad_ext_wakeup <source lang=c> 0x4008ee9c <rtc_pad_ext_wakeup>: entry a1, 32 0x4008ee9f <rtc_pad_ext_wakeup+3>: mov.n a10, a2 0x4008eea1 <rtc_pad_ext_wakeup+5>: movi.n a11, 1 0x4008eea3 <rtc_pad_ext_wakeup+7>: call8 0x4008d2f4 <rtc_pads_muxsel> /* rtc_pads_muxsel (p1, 1) */ 0x4008eea6 <rtc_pad_ext_wakeup+10>: mov.n a10, a2 0x4008eea8 <rtc_pad_ext_wakeup+12>: movi.n a11, 0 0x4008eeaa <rtc_pad_ext_wakeup+14>: call8 0x4008d54c <rtc_pads_funsel> /* rtc_pads_funsel (p1, 0) */ 0x4008eead <rtc_pad_ext_wakeup+17>: l32r a8, 0x4008edf4 /* a8 = *(4008edf4) = 0x3ff4840c, RTC_GPIO_ENABLE_REG */ 0x4008eeb0 <rtc_pad_ext_wakeup+20>: slli a9, a2, 14 0x4008eeb3 <rtc_pad_ext_wakeup+23>: memw 0x4008eeb6 <rtc_pad_ext_wakeup+26>: l32i.n a10, a8, 0 /* a10 = read RTC_GPIO_ENABLE_REG */ 0x4008eeb8 <rtc_pad_ext_wakeup+28>: movi.n a11, -1 /* a11 = 0xffff ffff */ 0x4008eeba <rtc_pad_ext_wakeup+30>: xor a9, a11, a9 /* a9 = ~a9 */ 0x4008eebd <rtc_pad_ext_wakeup+33>: and a9, a9, a10 /* a9 = a10 & a9 */ 0x4008eec0 <rtc_pad_ext_wakeup+36>: memw 0x4008eec3 <rtc_pad_ext_wakeup+39>: s32i.n a9, a8, 0 /* store to RTC_GPIO_ENABLE_REG, disable the output of the RTC_PAD */ 0x4008eec5 <rtc_pad_ext_wakeup+41>: mov.n a10, a2 0x4008eec7 <rtc_pad_ext_wakeup+43>: movi a11, 1 0x4008eeca <rtc_pad_ext_wakeup+46>: call8 0x4008d794 <rtc_pads_slpsel> /* rtc_pads_slpsel (p1, 1) */ 0x4008eecd <rtc_pad_ext_wakeup+49>: mov.n a10, a2 0x4008eecf <rtc_pad_ext_wakeup+51>: movi a11, 0 0x4008eed2 <rtc_pad_ext_wakeup+54>: call8 0x4008d9dc <rtc_pads_slpoe> /* rtc_pads_slpoe (p1, 0) */ 0x4008eed5 <rtc_pad_ext_wakeup+57>: mov.n a10, a2 0x4008eed7 <rtc_pad_ext_wakeup+59>: movi a11, 1 0x4008eeda <rtc_pad_ext_wakeup+62>: call8 0x4008db68 <rtc_pads_slpie> /* rtc_pads_slpie (p1, 1) */ 0x4008eedd <rtc_pad_ext_wakeup+65>: mov.n a10, a2 0x4008eedf <rtc_pad_ext_wakeup+67>: movi a11, 1 0x4008eee2 <rtc_pad_ext_wakeup+70>: call8 0x4008dcf0 <rtc_pads_funie> /* rtc_pads_funie (p1, 1) */ 0x4008eee5 <rtc_pad_ext_wakeup+73>: mov.n a10, a2 0x4008eee7 <rtc_pad_ext_wakeup+75>: movi a11, 0 0x4008eeea <rtc_pad_ext_wakeup+78>: call8 0x4008de78 <rtc_pads_pu> /* rtc_pads_pu (p1, 0) */ 0x4008eeed <rtc_pad_ext_wakeup+81>: mov.n a10, a2 0x4008eeef <rtc_pad_ext_wakeup+83>: movi.n a11, 0 0x4008eef1 <rtc_pad_ext_wakeup+85>: call8 0x4008e000 <rtc_pads_pd> /* rtc_pads_pd (p1, 0) */ 0x4008eef4 <rtc_pad_ext_wakeup+88>: l32r a8, 0x4008ee90 /* a8 = *(0x4008ee90) = 0x3ff484bc, RTC_IO_EXT_WAKEUP0_REG */ 0x4008eef7 <rtc_pad_ext_wakeup+91>: l32r a2, 0x4008ee94 /* a2 = *(0x4008ee94) = 0x07ffffff */ 0x4008eefa <rtc_pad_ext_wakeup+94>: memw 0x4008eefd <rtc_pad_ext_wakeup+97>: l32i.n a9, a8, 0 /* a9 = read RTC_IO_EXT_WAKEUP0_REG */ 0x4008eeff <rtc_pad_ext_wakeup+99>: slli a3, a3, 27 /* a3 = p2 << 27 */ 0x4008ef02 <rtc_pad_ext_wakeup+102>: and a9, a9, a2 /* a9 = RTC_IO_EXT_WAKEUP0_REG & 0x07ff ffff */ 0x4008ef05 <rtc_pad_ext_wakeup+105>: or a3, a3, a9 /* a3 = (p2 << 27) | a9 */ 0x4008ef08 <rtc_pad_ext_wakeup+108>: l32r a2, 0x4008ee98 /* a2 = *(0x4008ee98) = 0x3ff48060, RTC_CNTL_EXT_WAKEUP_CONF_REG */ 0x4008ef0b <rtc_pad_ext_wakeup+111>: memw 0x4008ef0e <rtc_pad_ext_wakeup+114>: s32i.n a3, a8, 0 /* write to RTC_IO_EXT_WAKEUP0_REG */ 0x4008ef10 <rtc_pad_ext_wakeup+116>: memw 0x4008ef13 <rtc_pad_ext_wakeup+119>: l32i.n a8, a2, 0 /* a8 = read RTC_CNTL_EXT_WAKEUP_CONF_REG */ 0x4008ef15 <rtc_pad_ext_wakeup+121>: l32r a3, 0x4008838c /* a3 = *(0x4008838c) = 0xbfffffff */ 0x4008ef18 <rtc_pad_ext_wakeup+124>: extui a4, a4, 0, 1 /* a4 = p3[0] */ 0x4008ef1b <rtc_pad_ext_wakeup+127>: slli a4, a4, 30 /* a4 = a4 << 30 */ 0x4008ef1e <rtc_pad_ext_wakeup+130>: and a3, a8, a3 /* a3 = a8 & a3 = RTC_CNTL_EXT_WAKEUP_CONF_REG & 0xbfff ffff */ 0x4008ef21 <rtc_pad_ext_wakeup+133>: or a4, a4, a3 /* a4 = RTC_CNTL_EXT_WAKEUP_CONF_REG & 0xbfff ffff | (p3[0] << 30) */ 0x4008ef24 <rtc_pad_ext_wakeup+136>: memw 0x4008ef27 <rtc_pad_ext_wakeup+139>: s32i.n a4, a2, 0 /* write to RTC_CNTL_EXT_WAKEUP_CONF_REG */ /* use the EXT_WAKEUP0, 0: external wakeup at low level 1: external wakeup at high level */ 0x4008ef29 <rtc_pad_ext_wakeup+141>: retw.n </source> So: <source lang=c> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * rtc_io_num is the number of rtc_pad. e.g. The number of RTC_GPIO5 is 5 * wakeup_level = 0: external wakeup at low level * wakeup_level = 1: external wakeup at high level */ void rtc_pad_ext_wakeup(rtc_gpio_num_t rtc_pad, uint8_t rtc_io_num, uint8_t wakeup_level); </source> <br> ==== rtc_cmd_ext_wakeup ==== <source lang=bash> 0x4008ef2c <rtc_cmd_ext_wakeup>: entry a1, 32 0x4008ef2f <rtc_cmd_ext_wakeup+3>: mov.n a10, a2 0x4008ef31 <rtc_cmd_ext_wakeup+5>: movi.n a11, 1 0x4008ef33 <rtc_cmd_ext_wakeup+7>: call8 0x4008d2f4 <rtc_pads_muxsel> 0x4008ef36 <rtc_cmd_ext_wakeup+10>: mov.n a10, a2 0x4008ef38 <rtc_cmd_ext_wakeup+12>: movi.n a11, 0 0x4008ef3a <rtc_cmd_ext_wakeup+14>: call8 0x4008d54c <rtc_pads_funsel> 0x4008ef3d <rtc_cmd_ext_wakeup+17>: l32r a8, 0x4008edf4 0x4008ef40 <rtc_cmd_ext_wakeup+20>: slli a9, a2, 14 0x4008ef43 <rtc_cmd_ext_wakeup+23>: memw 0x4008ef46 <rtc_cmd_ext_wakeup+26>: l32i.n a10, a8, 0 0x4008ef48 <rtc_cmd_ext_wakeup+28>: movi.n a11, -1 0x4008ef4a <rtc_cmd_ext_wakeup+30>: xor a9, a11, a9 0x4008ef4d <rtc_cmd_ext_wakeup+33>: and a9, a9, a10 0x4008ef50 <rtc_cmd_ext_wakeup+36>: memw 0x4008ef53 <rtc_cmd_ext_wakeup+39>: s32i.n a9, a8, 0 0x4008ef55 <rtc_cmd_ext_wakeup+41>: mov.n a10, a2 0x4008ef57 <rtc_cmd_ext_wakeup+43>: movi a11, 1 0x4008ef5a <rtc_cmd_ext_wakeup+46>: call8 0x4008d794 <rtc_pads_slpsel> 0x4008ef5d <rtc_cmd_ext_wakeup+49>: mov.n a10, a2 0x4008ef5f <rtc_cmd_ext_wakeup+51>: movi a11, 0 0x4008ef62 <rtc_cmd_ext_wakeup+54>: call8 0x4008d9dc <rtc_pads_slpoe> 0x4008ef65 <rtc_cmd_ext_wakeup+57>: mov.n a10, a2 0x4008ef67 <rtc_cmd_ext_wakeup+59>: movi a11, 1 0x4008ef6a <rtc_cmd_ext_wakeup+62>: call8 0x4008db68 <rtc_pads_slpie> 0x4008ef6d <rtc_cmd_ext_wakeup+65>: mov.n a10, a2 0x4008ef6f <rtc_cmd_ext_wakeup+67>: movi a11, 1 0x4008ef72 <rtc_cmd_ext_wakeup+70>: call8 0x4008dcf0 <rtc_pads_funie> 0x4008ef75 <rtc_cmd_ext_wakeup+73>: mov.n a10, a2 0x4008ef77 <rtc_cmd_ext_wakeup+75>: movi a11, 0 0x4008ef7a <rtc_cmd_ext_wakeup+78>: call8 0x4008de78 <rtc_pads_pu> 0x4008ef7d <rtc_cmd_ext_wakeup+81>: mov.n a10, a2 0x4008ef7f <rtc_cmd_ext_wakeup+83>: movi.n a11, 0 0x4008ef81 <rtc_cmd_ext_wakeup+85>: call8 0x4008e000 <rtc_pads_pd> 0x4008ef84 <rtc_cmd_ext_wakeup+88>: l32r a8, 0x4008ee90 0x4008ef87 <rtc_cmd_ext_wakeup+91>: l32r a2, 0x4008ee94 0x4008ef8a <rtc_cmd_ext_wakeup+94>: memw 0x4008ef8d <rtc_cmd_ext_wakeup+97>: l32i.n a9, a8, 0 0x4008ef8f <rtc_cmd_ext_wakeup+99>: slli a3, a3, 27 0x4008ef92 <rtc_cmd_ext_wakeup+102>: and a9, a9, a2 0x4008ef95 <rtc_cmd_ext_wakeup+105>: or a3, a3, a9 0x4008ef98 <rtc_cmd_ext_wakeup+108>: l32r a2, 0x4008ee98 /* a2 = *(0x4008ee98) = 0x3ff48060, RTC_CNTL_EXT_WAKEUP_CONF_REG */ 0x4008ef9b <rtc_cmd_ext_wakeup+111>: memw 0x4008ef9e <rtc_cmd_ext_wakeup+114>: s32i.n a3, a8, 0 0x4008efa0 <rtc_cmd_ext_wakeup+116>: memw /* All above is same as rtc_pad_ext_wakeup ! */ 0x4008efa3 <rtc_cmd_ext_wakeup+119>: l32i.n a8, a2, 0 /* a8 = read RTC_CNTL_EXT_WAKEUP_CONF_REG */ 0x4008efa5 <rtc_cmd_ext_wakeup+121>: l32r a3, 0x400805fc /* a3 = *(0x400805fc) = 0x40000000 */ 0x4008efa8 <rtc_cmd_ext_wakeup+124>: or a3, a8, a3 /* a3 = 0x40000000 | RTC_CNTL_EXT_WAKEUP_CONF_REG, Set BIT(30) to 1 */ /* EXT_WAKEUP0, external wake up at high level */ 0x4008efab <rtc_cmd_ext_wakeup+127>: memw 0x4008efae <rtc_cmd_ext_wakeup+130>: s32i.n a3, a2, 0 0x4008efb0 <rtc_cmd_ext_wakeup+132>: retw.n </source> So: <source lang=c> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * rtc_io_num is the number of rtc_pad. e.g. The number of RTC_GPIO5 is 5 */ void rtc_cmd_ext_wakeup(rtc_gpio_num_t rtc_pad, uint8_t rtc_io_num); </source> <br> ==== rtc_pad_gpio_wakeup ==== Only available in light sleep mode <source lang=bash> 0x4008edfc <rtc_pad_gpio_wakeup>: entry a1, 32 0x4008edff <rtc_pad_gpio_wakeup+3>: mov.n a10, a2 0x4008ee01 <rtc_pad_gpio_wakeup+5>: movi.n a11, 1 0x4008ee03 <rtc_pad_gpio_wakeup+7>: call8 0x4008d2f4 <rtc_pads_muxsel> /* rtc_pads_muxsel(p1, 1) */ 0x4008ee06 <rtc_pad_gpio_wakeup+10>: mov.n a10, a2 0x4008ee08 <rtc_pad_gpio_wakeup+12>: movi.n a11, 0 0x4008ee0a <rtc_pad_gpio_wakeup+14>: call8 0x4008d54c <rtc_pads_funsel> /* rtc_pad_funsel(p1, 0) */ 0x4008ee0d <rtc_pad_gpio_wakeup+17>: l32r a8, 0x4008edf4 /* a8 = 0x3ff4840c, RTC_GPIO_ENABLE_REG */ 0x4008ee10 <rtc_pad_gpio_wakeup+20>: movi.n a9, -1 /* a9 = 0xffff ffff */ 0x4008ee12 <rtc_pad_gpio_wakeup+22>: memw 0x4008ee15 <rtc_pad_gpio_wakeup+25>: l32i.n a10, a8, 0 /* a10 = read RTC_GPIO_ENABLE_REG */ 0x4008ee17 <rtc_pad_gpio_wakeup+27>: xor a9, a9, a2 /* a9 = ~p1 = p1 ^ 0xffff ffff */ 0x4008ee1a <rtc_pad_gpio_wakeup+30>: and a9, a9, a10 /* a9 = a9 & RTC_GPIO_ENABLE_REG */ 0x4008ee1d <rtc_pad_gpio_wakeup+33>: memw 0x4008ee20 <rtc_pad_gpio_wakeup+36>: s32i.n a9, a8, 0 0x4008ee22 <rtc_pad_gpio_wakeup+38>: mov.n a10, a2 0x4008ee24 <rtc_pad_gpio_wakeup+40>: movi a11, 1 0x4008ee27 <rtc_pad_gpio_wakeup+43>: call8 0x4008d794 <rtc_pads_slpsel> /* rtc_pads_slpsel(p1, 1) */ 0x4008ee2a <rtc_pad_gpio_wakeup+46>: mov.n a10, a2 0x4008ee2c <rtc_pad_gpio_wakeup+48>: movi a11, 0 0x4008ee2f <rtc_pad_gpio_wakeup+51>: call8 0x4008d9dc <rtc_pads_slpoe> /* rtc_pads_slpoe(p1, 0) */ 0x4008ee32 <rtc_pad_gpio_wakeup+54>: mov.n a10, a2 0x4008ee34 <rtc_pad_gpio_wakeup+56>: movi a11, 1 0x4008ee37 <rtc_pad_gpio_wakeup+59>: call8 0x4008db68 <rtc_pads_slpie> /* rtc_pads_slpie(p1, 1) */ 0x4008ee3a <rtc_pad_gpio_wakeup+62>: mov.n a10, a2 0x4008ee3c <rtc_pad_gpio_wakeup+64>: movi a11, 1 0x4008ee3f <rtc_pad_gpio_wakeup+67>: call8 0x4008dcf0 <rtc_pads_funie> /* rtc_pads_funie(p1, 1) */ 0x4008ee42 <rtc_pad_gpio_wakeup+70>: mov.n a10, a2 0x4008ee44 <rtc_pad_gpio_wakeup+72>: movi.n a11, 0 0x4008ee46 <rtc_pad_gpio_wakeup+74>: call8 0x4008de78 <rtc_pads_pu> /* rtc_pads_pu(p1, 0) */ 0x4008ee49 <rtc_pad_gpio_wakeup+77>: mov.n a10, a2 0x4008ee4b <rtc_pad_gpio_wakeup+79>: movi.n a11, 0 0x4008ee4d <rtc_pad_gpio_wakeup+81>: call8 0x4008e000 <rtc_pads_pd> /* rtc_pads_pd(p1, 0) */ 0x4008ee50 <rtc_pad_gpio_wakeup+84>: extui a3, a3, 0, 3 /* a3 = p2[2:0] */ 0x4008ee53 <rtc_pad_gpio_wakeup+87>: l32r a8, 0x4008edf0 /* a8 = *(0x4008edf0) = 0x3ff48428, RTC_GPIO_PIN0_REG */ 0x4008ee56 <rtc_pad_gpio_wakeup+90>: l32r a10, 0x4008edf8 /* a10 = *(0x4008edf8) = 0x3ff48470 */ /* RTC_GPIO_PIN17_REG addr is 0x3ff4846c */ 0x4008ee59 <rtc_pad_gpio_wakeup+93>: slli a14, a3, 7 /* a14 = p2[2:0] << 7 */ 0x4008ee5c <rtc_pad_gpio_wakeup+96>: movi.n a9, 1 0x4008ee5e <rtc_pad_gpio_wakeup+98>: movi a13, 0x400 0x4008ee61 <rtc_pad_gpio_wakeup+101>: movi a12, 0xfffffc7f 0x4008ee64 <rtc_pad_gpio_wakeup+104>: bnone a9, a2, 0x4008ee84 <rtc_pad_gpio_wakeup+136> /* branch; if (a9 & a2 == 0); */ 0x4008ee67 <rtc_pad_gpio_wakeup+107>: memw 0x4008ee6a <rtc_pad_gpio_wakeup+110>: l32i.n a11, a8, 0 /* a11 = read RTC_GPIO_PINx_REG */ 0x4008ee6c <rtc_pad_gpio_wakeup+112>: or a11, a11, a13 /* a11 = RTC_GPIO_PINx_REG | 0x400 */ 0x4008ee6f <rtc_pad_gpio_wakeup+115>: memw 0x4008ee72 <rtc_pad_gpio_wakeup+118>: s32i.n a11, a8, 0 /* write to RTC_GPIO_PINx_REG */ 0x4008ee74 <rtc_pad_gpio_wakeup+120>: memw 0x4008ee77 <rtc_pad_gpio_wakeup+123>: l32i.n a11, a8, 0 /* a11 = read RTC_GPIO_PINx_REG */ 0x4008ee79 <rtc_pad_gpio_wakeup+125>: and a11, a11, a12 /* a11 = RTC_GPIO_PINx_REG & 0xfffffc7f */ 0x4008ee7c <rtc_pad_gpio_wakeup+128>: or a11, a11, a14 /* a11 |= (p2[2:0] << 7) */ 0x4008ee7f <rtc_pad_gpio_wakeup+131>: memw 0x4008ee82 <rtc_pad_gpio_wakeup+134>: s32i.n a11, a8, 0 /* write to RTC_GPIO_PIN0_REG */ 0x4008ee84 <rtc_pad_gpio_wakeup+136>: addi.n a8, a8, 4 /* a8 = 0x3ff48428 + i*4, RTC_GPIO_PINx_REG */ 0x4008ee86 <rtc_pad_gpio_wakeup+138>: slli a9, a9, 1 /* a9 <<= 1 */ 0x4008ee89 <rtc_pad_gpio_wakeup+141>: bne a8, a10, 0x4008ee64 <rtc_pad_gpio_wakeup+104> /* branch; if (a8 != a10); */ 0x4008ee8c <rtc_pad_gpio_wakeup+144>: retw.n </source> So: <source lang=c> typedef enum { RTC_GPIO0 = BIT(0), RTC_GPIO1 = BIT(1), ...... ...... RTC_GPIO17 = BIT(17) } rtc_gpio_num_t; /* * int_type: * 0: GPIO interrupt disable * 1: rising edge * 2: falling edge trigger * 3: any edge trigger * 4: low level trigger * 5: high level trigger */ void rtc_pad_gpio_wakeup(rtc_gpio_num_t rtc_pad, uint8_t int_type); </source> <br>
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ESP32 RTC
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