ESP32 RTC External Wakeup
来自Jack's Lab
(版本间的差异)
(→Compile & Upload) |
(→Compile & Upload) |
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第30行: | 第30行: | ||
$ make menuconfig | $ make menuconfig | ||
$ make flash | $ make flash | ||
+ | </source> | ||
+ | |||
+ | <br><br> | ||
+ | |||
+ | == API == | ||
+ | |||
+ | <source lang=c> | ||
+ | #define DEEP_SLEEP_PD_NORMAL BIT(0) /* Base deep sleep mode */ | ||
+ | #define DEEP_SLEEP_PD_RTC_PERIPH BIT(1) /* Power down RTC peripherals */ | ||
+ | #define DEEP_SLEEP_PD_RTC_SLOW_MEM BIT(2) /* Power down RTC SLOW memory */ | ||
+ | #define DEEP_SLEEP_PD_RTC_FAST_MEM BIT(3) /* Power down RTC FAST memory */ | ||
+ | |||
+ | /* | ||
+ | * @brief Prepare for entering sleep mode | ||
+ | * @param deep_slp DEEP_SLEEP_PD_ flags combined with OR (DEEP_SLEEP_PD_NORMAL must be included) | ||
+ | * @param cpu_lp_mode for deep sleep, should be 0 | ||
+ | */ | ||
+ | void rtc_slp_prep_lite(uint32_t deep_slp, uint32_t cpu_lp_mode); | ||
+ | |||
+ | #define RTC_EXT_EVENT0_TRIG BIT(0) | ||
+ | #define RTC_EXT_EVENT1_TRIG BIT(1) | ||
+ | #define RTC_GPIO_TRIG BIT(2) /* Only available in light sleep */ | ||
+ | #define RTC_TIMER_EXPIRE BIT(3) | ||
+ | #define RTC_SDIO_TRIG BIT(4) | ||
+ | #define RTC_MAC_TRIG BIT(5) | ||
+ | #define RTC_UART0_TRIG BIT(6) | ||
+ | #define RTC_UART1_TRIG BIT(7) | ||
+ | #define RTC_TOUCH_TRIG BIT(8) | ||
+ | #define RTC_SAR_TRIG BIT(9) | ||
+ | #define RTC_BT_TRIG BIT(10) | ||
+ | |||
+ | /* | ||
+ | * @brief Enter sleep mode for given number of cycles | ||
+ | * @param cycles_h higher 32 bit part of number of slow clock cycles | ||
+ | * @param cycles_l lower 32 bit part of number of slow clock cycles | ||
+ | * @param wakeup_opt wake up reason to enable (RTC_xxx_TRIG flags combined with OR) | ||
+ | * @param reject_opt reserved, should be 0 | ||
+ | * @return TBD | ||
+ | */ | ||
+ | uint32_t rtc_sleep(uint32_t cycles_h, uint32_t cycles_l, uint32_t wakeup_opt, uint32_t reject_opt); | ||
+ | |||
+ | typedef enum { | ||
+ | RTC_GPIO0_SEL = BIT(0), | ||
+ | RTC_GPIO1_SEL = BIT(1), | ||
+ | RTC_GPIO2_SEL = BIT(2), | ||
+ | RTC_GPIO3_SEL = BIT(3), | ||
+ | RTC_GPIO4_SEL = BIT(4), | ||
+ | RTC_GPIO5_SEL = BIT(5), | ||
+ | RTC_GPIO6_SEL = BIT(6), | ||
+ | RTC_GPIO7_SEL = BIT(7), | ||
+ | RTC_GPIO8_SEL = BIT(8), | ||
+ | RTC_GPIO9_SEL = BIT(9), | ||
+ | RTC_GPIO10_SEL = BIT(10), | ||
+ | RTC_GPIO11_SEL = BIT(11), | ||
+ | RTC_GPIO12_SEL = BIT(12), | ||
+ | RTC_GPIO13_SEL = BIT(13), | ||
+ | RTC_GPIO14_SEL = BIT(14), | ||
+ | RTC_GPIO15_SEL = BIT(15), | ||
+ | RTC_GPIO16_SEL = BIT(16), | ||
+ | RTC_GPIO17_SEL = BIT(17) | ||
+ | } rtc_gpio_sel_t; | ||
+ | |||
+ | void rtc_pads_muxsel(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | void rtc_pads_funsel(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | void rtc_pads_slpsel(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | |||
+ | void rtc_pads_hold(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | void rtc_pads_pu(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | void rtc_pads_pd(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | void rtc_pads_slpie(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | void rtc_pads_slpoe(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | void rtc_pads_funie(rtc_gpio_sel_t rtc_io_sel, uint8_t set); | ||
+ | |||
+ | /* | ||
+ | * Using the EXT_WAKEUP0 slot. So you need to enable the RTC_EXT_EVENT0_TRIG | ||
+ | * in rtc_sleep() | ||
+ | * | ||
+ | * rtc_io_num is the number of rtc_pad. e.g. The number of RTC_GPIO5 is 5 | ||
+ | * wakeup_level = 0: external wakeup at low level | ||
+ | * wakeup_level = 1: external wakeup at high level | ||
+ | */ | ||
+ | void rtc_pad_ext_wakeup(rtc_gpio_sel_t rtc_io_sel, uint8_t rtc_io_num, uint8_t wakeup_level); | ||
</source> | </source> | ||
2016年12月4日 (日) 00:05的版本
目录 |
1 Overview
2 Quick Start
In Linux:
2.1 Install ESP-IDF
$ sudo apt-get install git wget make libncurses-dev flex bison gperf python python-serial $ wget https://dl.espressif.com/dl/xtensa-esp32-elf-linux32-1.22.0-59.tar.gz $ mkdir -p toolchain $ tar zxf xtensa-esp32-elf-linux32-1.22.0-59.tar.gz -C toolchain $ export PATH=$PATH:`pwd`/toolchain/xtensa-esp32-elf/bin $ $ git clone --recursive git://github.com/icamgo/esp-idf.git $ export IDF_PATH=`pwd`/esp-idf
2.2 Compile & Upload
$ cd esp-idf/examples/20_ext_wakeup $ make menuconfig $ make flash
3 API
#define DEEP_SLEEP_PD_NORMAL BIT(0) /* Base deep sleep mode */ #define DEEP_SLEEP_PD_RTC_PERIPH BIT(1) /* Power down RTC peripherals */ #define DEEP_SLEEP_PD_RTC_SLOW_MEM BIT(2) /* Power down RTC SLOW memory */ #define DEEP_SLEEP_PD_RTC_FAST_MEM BIT(3) /* Power down RTC FAST memory */ /* * @brief Prepare for entering sleep mode * @param deep_slp DEEP_SLEEP_PD_ flags combined with OR (DEEP_SLEEP_PD_NORMAL must be included) * @param cpu_lp_mode for deep sleep, should be 0 */ void rtc_slp_prep_lite(uint32_t deep_slp, uint32_t cpu_lp_mode); #define RTC_EXT_EVENT0_TRIG BIT(0) #define RTC_EXT_EVENT1_TRIG BIT(1) #define RTC_GPIO_TRIG BIT(2) /* Only available in light sleep */ #define RTC_TIMER_EXPIRE BIT(3) #define RTC_SDIO_TRIG BIT(4) #define RTC_MAC_TRIG BIT(5) #define RTC_UART0_TRIG BIT(6) #define RTC_UART1_TRIG BIT(7) #define RTC_TOUCH_TRIG BIT(8) #define RTC_SAR_TRIG BIT(9) #define RTC_BT_TRIG BIT(10) /* * @brief Enter sleep mode for given number of cycles * @param cycles_h higher 32 bit part of number of slow clock cycles * @param cycles_l lower 32 bit part of number of slow clock cycles * @param wakeup_opt wake up reason to enable (RTC_xxx_TRIG flags combined with OR) * @param reject_opt reserved, should be 0 * @return TBD */ uint32_t rtc_sleep(uint32_t cycles_h, uint32_t cycles_l, uint32_t wakeup_opt, uint32_t reject_opt); typedef enum { RTC_GPIO0_SEL = BIT(0), RTC_GPIO1_SEL = BIT(1), RTC_GPIO2_SEL = BIT(2), RTC_GPIO3_SEL = BIT(3), RTC_GPIO4_SEL = BIT(4), RTC_GPIO5_SEL = BIT(5), RTC_GPIO6_SEL = BIT(6), RTC_GPIO7_SEL = BIT(7), RTC_GPIO8_SEL = BIT(8), RTC_GPIO9_SEL = BIT(9), RTC_GPIO10_SEL = BIT(10), RTC_GPIO11_SEL = BIT(11), RTC_GPIO12_SEL = BIT(12), RTC_GPIO13_SEL = BIT(13), RTC_GPIO14_SEL = BIT(14), RTC_GPIO15_SEL = BIT(15), RTC_GPIO16_SEL = BIT(16), RTC_GPIO17_SEL = BIT(17) } rtc_gpio_sel_t; void rtc_pads_muxsel(rtc_gpio_sel_t rtc_io_sel, uint8_t set); void rtc_pads_funsel(rtc_gpio_sel_t rtc_io_sel, uint8_t set); void rtc_pads_slpsel(rtc_gpio_sel_t rtc_io_sel, uint8_t set); void rtc_pads_hold(rtc_gpio_sel_t rtc_io_sel, uint8_t set); void rtc_pads_pu(rtc_gpio_sel_t rtc_io_sel, uint8_t set); void rtc_pads_pd(rtc_gpio_sel_t rtc_io_sel, uint8_t set); void rtc_pads_slpie(rtc_gpio_sel_t rtc_io_sel, uint8_t set); void rtc_pads_slpoe(rtc_gpio_sel_t rtc_io_sel, uint8_t set); void rtc_pads_funie(rtc_gpio_sel_t rtc_io_sel, uint8_t set); /* * Using the EXT_WAKEUP0 slot. So you need to enable the RTC_EXT_EVENT0_TRIG * in rtc_sleep() * * rtc_io_num is the number of rtc_pad. e.g. The number of RTC_GPIO5 is 5 * wakeup_level = 0: external wakeup at low level * wakeup_level = 1: external wakeup at high level */ void rtc_pad_ext_wakeup(rtc_gpio_sel_t rtc_io_sel, uint8_t rtc_io_num, uint8_t wakeup_level);
4 Reference
- For more information please refer to