ESP32 SPR

来自Jack's Lab
(版本间的差异)
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(PRID)
(PRID)
第37行: 第37行:
 
     uint32_t pd;
 
     uint32_t pd;
  
    get_chip_version();
 
 
     //asm volatile ("rsr %0, PRID" : "=r" (pd));
 
     //asm volatile ("rsr %0, PRID" : "=r" (pd));
 
     asm volatile ("rsr.prid %0" : "=r" (pd));
 
     asm volatile ("rsr.prid %0" : "=r" (pd));

2016年11月21日 (一) 23:55的版本

1 Overview

Speical Registers of ESP32 (Xtensa) hold the majority of the state added to the processor.



2 R/W SPR

 rsr.* a2
 wsr.* a2
 xsr.* a2      <--- exchanges the values in a General Register (GPR) and a Special Register (SPR)

For example:

rsr.prid a2



3 PRID

Processor ID

PRID on the ESP108 architecture (ESP32) :

  • 0xCDCD on the PRO processor
  • 0xABAB on the APP CPU


We can distinguish between the two by simply checking bit 1: It's 1 on the APP and 0 on the PRO processor.


void dump_prid()
{
    uint32_t pd;

    //asm volatile ("rsr %0, PRID" : "=r" (pd));
    asm volatile ("rsr.prid %0" : "=r" (pd));
    printf("prid = 0x%08X\r\n", pd);
}























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