ESP32 SPR
来自Jack's Lab
目录 |
1 Overview
Speical Registers of ESP32 (Xtensa) hold the majority of the state added to the processor.
2 R/W SPR
rsr.* a2 wsr.* a2 xsr.* a2 <--- exchanges the values in a General Register (GPR) and a Special Register (SPR)
For example:
rsr.prid a2
3 PRID
Processor ID
PRID on the ESP108 architecture (ESP32) :
- 0xCDCD on the PRO processor
- 0xABAB on the APP CPU
We can distinguish between the two by simply checking bit 1: It's 1 on the APP and 0 on the PRO processor.
void dump_prid() { uint32_t pd; //asm volatile ("rsr %0, PRID" : "=r" (pd)); asm volatile ("rsr.prid %0" : "=r" (pd)); printf("prid = 0x%08X\r\n", pd); }
4 CONFIG
void dump_configid() { uint32_t c0, c1; //asm volatile ("rsr %0, CONFIGID0" : "=r" (c0)); //asm volatile ("rsr %0, CONFIGID1" : "=r" (c1)); asm volatile ("rsr.configid0 %0" : "=r" (c0)); asm volatile ("rsr.configid1 %0" : "=r" (c1)); printf("configid0 = 0x%08X\r\n", c0); printf("configid1 = 0x%08X\r\n", c1); }