ESP8266 Memory Map

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== 编译布局 ==
 
== 编译布局 ==
 +
 
<pre>
 
<pre>
#include <stdio.h>
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#include <stdlib.h>
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#include <ftdi.h>
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int main(void)
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{
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    int ret;
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    struct ftdi_context *ftdi;
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    struct ftdi_version_info version;
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    if ((ftdi = ftdi_new()) == 0)
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  {
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        fprintf(stderr, "ftdi_new failed\n");
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        return EXIT_FAILURE;
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    }
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    version = ftdi_get_library_version();
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    printf("Initialized libftdi %s (major: %d, minor: %d, micro: %d, snapshot ver: %s)\n",
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        version.version_str, version.major, version.minor, version.micro,
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        version.snapshot_str);
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    if ((ret = ftdi_usb_open(ftdi, 0x0403, 0x6001)) < 0)
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    {
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        fprintf(stderr, "unable to open ftdi device: %d (%s)\n", ret, ftdi_get_error_string(ftdi));
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        ftdi_free(ftdi);
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        return EXIT_FAILURE;
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    }
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    // Read out FTDIChip-ID of R type chips
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    if (ftdi->type == TYPE_R)
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    {
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        unsigned int chipid;
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        printf("ftdi_read_chipid: %d\n", ftdi_read_chipid(ftdi, &chipid));
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        printf("FTDI chipid: %X\n", chipid);
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    }
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    if ((ret = ftdi_usb_close(ftdi)) < 0)
+
    {
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        fprintf(stderr, "unable to close ftdi device: %d (%s)\n", ret, ftdi_get_error_string(ftdi));
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        ftdi_free(ftdi);
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        return EXIT_FAILURE;
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    }
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    ftdi_free(ftdi);
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    return EXIT_SUCCESS;
+
}
+
 
</pre>
 
</pre>
  

2015年12月8日 (二) 01:03的版本

1 编译布局




2 地址空间映射

/* RAM */
#define RAM_BASE		0x3FFE8000
#define RAM_SIZE		0x00018000	// Size: 98304 bytes
#define RAM_BIOS_DATA_BASE 	0x3FFFC000      // ROM-XTOS system data RAM. Size: 16384 bytes

/* IRAM */
#define IRAM_BASE		0x40100000
#define IRAM_SIZE		0x00008000	// Size: 32768 bytes

/* FLASH */
#define FLASH_BASE		0x40200000
#define FLASH_MIN_SIZE         	0x00080000	// 512 KB
#define FLASH_MAX_SIZE  	0x01000000      // 16 MB
#define FLASH_CACHE_MAX_SIZE	0x100000        // Size of Cached Flash

/* dport (io1) section */
#define DPORT_BASE		0x3ff00000

/* io2 section */
#define IO2_BASE		0x3ff20000	// Size: 6144 bytes

/* io3 section */
#define UART0_BASE		0x60000000
#define SPI1_BASE		0x60000100
#define SPI0_BASE		0x60000200
#define GPIO_BASE		0x60000300
#define HDRF_BASE		0x60000500
#define TIMER_BASE		0x60000600
#define RTC_BASE		0x60000700
#define IOMUX_BASE		0x60000800
#define WDT_BASE		0x60000900
#define SDIO_BASE		0x60000A00
#define SCL_BASE		0x60000B00
#define SAR_BASE		0x60000D00
#define I2S_BASE		0x60000E00
#define UART1_BASE		0x60000F00
#define RTC_RAM_BASE	        0x60001000	// Size: 1024 bytes
#define RTC_MEM_BASE	        0x60001100

/* io4 section */
#define IO4_BASE		0x60009800	// Size: 1536 bytes



















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