ESP8266 Memory Map
来自Jack's Lab
1 编译布局
#include <stdio.h> #include <fcntl.h> /* File Control Definitions */ #include <termios.h> /* POSIX Terminal Control Definitions */ #include <unistd.h> /* UNIX Standard Definitions */ #include <errno.h> /* ERROR Number Definitions */ #include <sys/ioctl.h> /* ioctl() */ main(void) { int fd; /*File Descriptor*/ int status; fd = open("/dev/ttyUSB0",O_RDWR | O_NOCTTY ); //Opening the serial port ioctl(fd,TIOCMGET,&status); /* GET the State of MODEM bits in Status */ status |= TIOCM_RTS; // Set the RTS pin ioctl(fd, TIOCMSET, status); getchar(); //To view the change in status pins before closing the port close(fd); } int disableRTS () { char fd, ret, flags; // open device if ((fd = open("/dev/cu.mydevice", O_RDWR | O_NDELAY)) < 0) { fprintf(stderr, "failed to open device"); return -1; } // Get the current state of the bits ioctl(fd, TIOCMGET, &flags); fprintf(stderr, "Flags are %x.\n", flags); flags &= ~TIOCM_RTS; // Disable the RTS bit ret = ioctl(fd, TIOCMSET, &flags); if (ret == -1) fprintf(stderr, "TIOCMSET failed\n"); else fprintf(stderr, "TIOCMSET succeeded. flags: %x.\n", flags); return 0; }
2 地址空间映射
/* RAM */ #define RAM_BASE 0x3FFE8000 #define RAM_SIZE 0x00018000 // Size: 98304 bytes #define RAM_BIOS_DATA_BASE 0x3FFFC000 // ROM-XTOS system data RAM. Size: 16384 bytes /* IRAM */ #define IRAM_BASE 0x40100000 #define IRAM_SIZE 0x00008000 // Size: 32768 bytes /* FLASH */ #define FLASH_BASE 0x40200000 #define FLASH_MIN_SIZE 0x00080000 // 512 KB #define FLASH_MAX_SIZE 0x01000000 // 16 MB #define FLASH_CACHE_MAX_SIZE 0x100000 // Size of Cached Flash /* dport (io1) section */ #define DPORT_BASE 0x3ff00000 /* io2 section */ #define IO2_BASE 0x3ff20000 // Size: 6144 bytes /* io3 section */ #define UART0_BASE 0x60000000 #define SPI1_BASE 0x60000100 #define SPI0_BASE 0x60000200 #define GPIO_BASE 0x60000300 #define HDRF_BASE 0x60000500 #define TIMER_BASE 0x60000600 #define RTC_BASE 0x60000700 #define IOMUX_BASE 0x60000800 #define WDT_BASE 0x60000900 #define SDIO_BASE 0x60000A00 #define SCL_BASE 0x60000B00 #define SAR_BASE 0x60000D00 #define I2S_BASE 0x60000E00 #define UART1_BASE 0x60000F00 #define RTC_RAM_BASE 0x60001000 // Size: 1024 bytes #define RTC_MEM_BASE 0x60001100 /* io4 section */ #define IO4_BASE 0x60009800 // Size: 1536 bytes