LoRa

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The Spreading Factor must be known in advance on both transmit and receive sides of the link
 
The Spreading Factor must be known in advance on both transmit and receive sides of the link
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 +
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<source lang=cpp>
 +
/*
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* Lora band width
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*  0: 7.8 kHz, 1: 10.4 kHz, 2: 15.6 kHz, 3: 20.8 kHz,
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*  4: 31.2 kHz,5: 41.6 kHz, 6: 62.5 kHz, 7: 125 kHz,
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*  8: 250 kHz, 9: 500 kHz, other: Reserved
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*/
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void sx1278_set_bandwidth(uint8_t bw)
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{
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    uint8_t d;
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    d = sx1278_read_reg(REG_MODEMCONFIG1);
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    d = (d & MODEMCONFIG1_BW_MASK) | (bw << 4);
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    sx1278_write_reg(REG_MODEMCONFIG1, d);
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}
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</source>
  
 
<br>
 
<br>

2017年10月13日 (五) 00:57的版本

目录

1 Key Concepts

1.1 Spreading Factor

Sx1278-spreading-factor.png


Note:

The Spreading Factor must be known in advance on both transmit and receive sides of the link as different spreading factors are orthogonal to each other


Spreading Factor 6:

  • Set Spreading Factor = 6 in Reg_ModemConfig2
  • The head must be set to Implicit mode (Reg_ModemConfig1[0] := 1)
  • Set the DetectionOptimize of Reg_LoRaDetectOptimize to value '0b101'
  • Write 0x0C in the RegDetectionThreshold 


void sx1278_set_spread_fact(uint8_t factor)
{
    uint8_t d;
    d = sx1278_read_reg(REG_MODEMCONFIG2);
    d = (d & MODEMCONFIG2_SF_MASK) | (factor << 4);
    sx1278_write_reg(REG_MODEMCONFIG2, d);

    if (factor == 6) {
        sx1278_write_reg(REG_DETECTIONOPTIMIZE, 0x5);                                       
        sx1278_write_reg(REG_DETECTIONTHRESHOLD, 0xC);                                      
    } else {
        sx1278_write_reg(REG_DETECTIONOPTIMIZE, 0x3);
        sx1278_write_reg(REG_DETECTIONTHRESHOLD, 0xA);                                      
    }
}


1.2 Signal Bandwidth

Sx1278-signal-bandwidth.png


Note:

The Spreading Factor must be known in advance on both transmit and receive sides of the link 


/*
 * Lora band width 
 *   0: 7.8 kHz, 1: 10.4 kHz, 2: 15.6 kHz, 3: 20.8 kHz,
 *   4: 31.2 kHz,5: 41.6 kHz, 6: 62.5 kHz, 7: 125 kHz,
 *   8: 250 kHz, 9: 500 kHz, other: Reserved
*/
void sx1278_set_bandwidth(uint8_t bw)
{
    uint8_t d;
    d = sx1278_read_reg(REG_MODEMCONFIG1);
    d = (d & MODEMCONFIG1_BW_MASK) | (bw << 4);
    sx1278_write_reg(REG_MODEMCONFIG1, d);
}


1.3 Coding Rate

Sx1278-coding-rate.png



2 TX

  • Static configuration registers can only be accessed in Sleep, Standby or FSTX mode
  • The LoRa FIFO can only be filled in Standby mode
  • Data TX is initiated by sending TX mode request
  • Upon completion the TxDone interrupt is issued and the radio returns to Standby mode
  • Following transmission the radio can be manually placed in Sleep mode or the FIFO refilled for subsequent TX operation


LoRa TX data FIFO filling:

  • Set Reg_FifoAddrPtr to Reg_FifoTxBaseAddr
  • Write PayloadLength bytes to the FIFO (Reg_Fifo)


Reg_Fifo 是 FIFO 的统一读写口，SPI 读写 Reg_Fifo，就会去 FIFO 内部地址为 Reg_FifoAddrPtr 的位置取放数据

TX_Modem 直接去 FIFO 地址为 Reg_FifoTxBaseAddr 的位置，取 PayloadLength 字节的数据



3 TX Power

1. Set Reg_PaConfig[7:7] to select PA output pin

  • 0 to select RFO pin, Output power is limited to +14 dBm (25mW)
  • 1 to select PA_BOOST pin, Output power is limited to +20 dBm (100mW)


2. Set Reg_PaConfig[6:4] to select max output power

  • Pmax = 10.8 + 0.6 * MaxPower [dBm], valide when user select the RFO pin as the output


3. Set Reg_PaConfig[3:0] to select OutputPower

  • Pout = Pmax - (15 - OutputPower) if PaSelect = 1 (RFO pin)
  • Pout = 17 - (15 - OutputPower) if PaSelect = 1 (PA_BOOST pin) 


void sx1278_set_rf_maxpower()
{
    sx1278_write_reg(REG_PACONFIG, 0x8F);
}



4 Schematics

Sx1276-sch.png

http://modtronix.com/prod/imod/inair4/inair4_r1_sch.pdf



5 Chip

SX1276-77-78-79 .png


5.1 SX1278

SX1278 Datasheet



6 Reference























来自“http://wiki.jackslab.org/index.php?title=LoRa&oldid=8960”
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