SX126x

来自Jack's Lab
2020年12月25日 (五) 18:13Comcat (讨论 | 贡献)的版本

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目录

1 Overview

  • SX1262: (+22dBm), 150-960 MHz (e.g. 430/490MHz, 868/915MHz), Rx Current 4.6mA, QFN 4x4mm
  • SX1261: (+15dBm), 150-960 MHz (e.g. 430/490MHz, 868/915MHz), Rx Current 4.6mA, QFN 4x4mm
  • SX1268: (+22dBm), 410-810 MHz, Rx Current 4.6mA, QFN 4x4mm


  • 4.2 mA of active receive current consumption
  • 25 mA TX @ 14dbm
  • Programmable bit rate up to 62.5 kbps LoRa and 300 kbps FSK
  • High sensitivity: down to -148 dBm
  • 1.8 ~ 3.7V (3.9 max)


https://www.semtech.com/products/wireless-rf/lora-transceivers/sx1262


2 Notes

2.1 调试笔记

  • 2020/12/22: 弃用串口的 RX pin 后,校准 hung 问题解决
  • 2020/12/22: 电压一致后,get_status 终于返回 0x22 (avr + sx126x 返回 0x2A)
  • 2020/12/23: SPI 读写调整后,重用串口的 RX pin 为 Busy line,居然也没有 hung 问题了,怀疑是 RX 中断没那么频繁了



2.2 Busy Ctrl Line

Used to indicate the status of the internal state machine.

The amount of time the BUSY line is stay HIGH.

When the BUSY line is held low, it indicates that the internal state machine is in idle mode and that the radio is ready to accept a command from the host controller.

The BUSY line is set back to zero once the chip has reached a stable mode and it's ready for a new command


2.3 RF Switch

  • DIO2 控制 RF Switch 之 ctrl,用于切换 RF1 (RF_OUT) 还是 RF2 (RF_IN) 连接到 RFC (ANT)


对于 RF switch PE4259:

  • Pin 6 (~CTRL) = VDD (3.3V Max), Pin 4 (CTRL) = High ------> RF1 (RFO, Pin1) -> RFC
  • Pin 6 (~CTRL) = VDD (3.3V Max), Pin 4 (CTRL) = Low ------> RF2 (RFI, Pin3) -> RFC

PE4259.pinmap.png


3 命令接口

3.1 查询接口

  • get_status()
    • opcode = 0xC0, NOP
    • return: RFU, Status
  • get_dev_errors()
    • opcode = 0x17, NOP, NOP, NOP
    • return: RFU, Status, OpError(15:8), OpError(7:0)
  • get_irq_status()
    • opcode = 0x12, NOP, NOP, NOP
    • return: RFU, Status, IrqStatus(15:8), IrqStatus(7:0)
  • get_rxbuf_status()
  • get_pkt_status()
  • get_packet_type()
  • get_stats()
  • get_rssi_inst()


3.2 设置接口

  • set_standby()
  • set_regulator_mode()
  • set_dio3_as_tcxo_ctrl()
  • set_dio2_as_rfswitch_ctrl()
  • set_buffer_base_addr()
    • opc = 0x8F, tx_addr, rx_addr
  • set_packet_type()
    • opc = 0x8A, pkt_type
    • pkt_type: 0x1 lora, 0x0 gfsk
  • set_rf_frequency()
    • opc = 0x86, rf_freq[31:24], rf_freq[23:16], rf_freq[15:8], rf_freq[7:0]
    • rf_freq = Freq * Ftcxo / 2^25
  • set_modulation_params()
    • opc = 0x8B, param1, param2, ... param4
    • param1: SF5 (0x05) ~ SF12 (0xC)
    • param2: BW7 (0x0), BW10 (0x8), BW20 (0x9), BW125 (0x4), BW250 (0x5), BW500 (0x6)
    • param3: CR4/5 (0x1) CR4/6 (0x2) ...
    • param4: Low Data Rate Optimize, 0x0: off; 0x1: on


  • set_packet_params()
    • opc = 0x8C, param1, param2 ... param9
    • param1: Preamble_Len[15:8]
    • param2: Preamble_Len[7:0]
    • param3: Header_Type, 0x0: explicit header
    • param4: Payload_Len, 0 ~ 0xFF
    • param5: CRC_Type, 0x0: off; 0x1: on
    • param6: Invert_IQ, 0x0: standard; 0x1: Inverted
  • set_pa_config()
    • opc = 0x95, duty_cycle, hp_max, dev_sel, pa_lut
  • set_tx_params()
    • opc = 0x8E, power, ramp_time
    • power: -9 (0xF7) ~ +22 (0x16) dBm
    • ramp_time: TCXO: 200us (0x4); XTAL: 20us (0x1)
  • set_tx()
    • opc = 0x83, timeout[23:16], timeout[15:8], timeout[7:0]
    • timeout = 0: Timeout disable, Tx single mode, the device will stay in TX mode utile the the packet is transmitted and returns in STBY_RC mode upon completion
    • timeout = others: Timeout active, the device remains in Tx mode it returns automatically to STBY_RC mode on timer end-of-count or when a packet has been transmitted. The maximum timeout is then 262s.
    • A TIMEOUT IRQ is triggered if the TX_DONE IRQ is not generated within the given timeout period
    • The chip goes back to STBY_RC mode after a TIMEOUT IRQ or a TX_DONE IRQ


3.3 IRQ

  • set_dio_irq_params()
    • opc = 0x08, irq_mask[15:8], irq_mask[7:0], dio1_mask[15:8], dio1_mask[7:0], dio2_mask[15:8], dio2_mask[7:0], dio3_mask[15:8], dio3_mask[7:0]
    • irq_mask: By default, all IRQ are masked (all ‘0’) and the user can enable them one by one (or several at a time) by setting the corresponding mask to ‘1’
    • dioX_mask: The interrupt causes a DIO to be set if the corresponding bit in dioX_mask and the irq_mask are set.
    • If DIO2 or DIO3 are used to control the RF Switch or the TCXO, the IRQ will not be generated even if it is mapped to the pins
    • mask[7:0]: CadDone, CrcErr, HeaderCrcErr, HeaderValid, SyncwordValid (FSK), PreambleDetected, RxDone, TxDone
    • mask[9:8]: Timeout (Rx or Tx), CadDetected
  • get_irq_status()
    • opc = 0x12, NOP, NOP, NOP
    • return: RFU, status, irq_status[15:8], irq_status[7:0]
  • clear_irq_status()
    • opc = 0x02, param[15:8], param[7:0]
    • Clears an IRQ flag in the IRQ register by setting to 1 the bit of Param corresponding to the same position.


3.4 CAD

相比 SX127x 系列只检测前导码,SX1262 可以同时检测前导码和数据部分。SX1262 通过配置 cadDetPeak 值调整检测灵敏度,cadDetPeak 越大则灵敏度越低,同时误检测也更低。

  • set_cad_params()
    • opc = 0x88, sym_num, det_peak, det_min, exit_mode, timeout[23:0]
    • sym_num: 0x0 ~ 0x4 (1 ~ 16 Number of Symbols used for CAD)
    • det_pek & det_min define the sensitivity of the LoRa modem when trying to correlate to actual LoRa preamble symbols. depend on the SF and BW, also depend on the number of symbols used to validate or not the detection. Refer to: SX126x CAD Settings
    • exit_mode: the action to be done after a CAD operation. 0x0: CAD Only; 0x1: CAD Rx (stays in RX until a packet is detected or the timer reaches the timeout defined by Timeout * 15.625 us)



3.5 读写接口

  • read_reg()
    • opc = 0x1D, addr[15:8], addr[7:0], NOP, 0, 0 ...
    • return: RFU, Status, Status, Status, data[0], data[1] ...
    • 读多少字节,NOP 后就跟几个 0
  • write_reg()
    • opc = 0x0D, addr[15:8], addr[7:0], data[0], data[1] ...
    • return: RFU, Status, Status, Status, Status ...
    • 写多少字节,addr 后就跟几个字节
  • read_buf()
    • opc = 0x1E, Offset, NOP, 0, 0 ...
    • return: RFU, Status, Status, data[0], data[1] ...
    • 读多少字节,NOP 后就跟几个 0
  • write_buf()
    • opc = 0x0E, Offset, data[0], data[1] ...
    • return: RFU, Status, Status, Status, Status ...
    • 写多少字节,offset 后就跟几个字节


4 Pinmap

Sx126x.pinmap.png


5 Application Schematics

5.1 Power

Sx126x-power.png


5.2 TCXO

Sx126x-TXCO-ctrl-block.png


5.3 参考实现

  • DC-DC 使用常用的 Option C
  • XTAL 使用的是非温补晶振,现在基本都使用 TCXO 了,这个要注意一下,实现的时候替换为 TCXO

Sx126x.app.sch.png


6 Module Pinmap

Sx126x-pinmap.jpg


7 ASR6500

ASR6500s 有三个子型号,分别是 ASR6500SL,ASR6500SLT,ASR6500SHT。

  • ASR6500SL 内部是 32M XO 晶振
  • ASR6500SLT 和 ASR6500SHT 内部是 32M TCXO 晶振。

TCXO 晶振需要在软件初始化时配置 DIO3 为 TCXO 控制引脚,并校准。同时 TCXO 唤醒时间配置为 5ms


8 Reference



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