迷你看门狗
来自Jack's Lab
主控SoC
- Tensilica Xtensa LX3 32-bit RISC SOC clocked at 80 MHz
- 32-bit ALU
- 16, 32 or 64 GPR
- six special purpose registers
- 80 base instructions
The Xtensa ISA employs 24-bit instructions with 16-bit narrow encodings for the most common instructions.
Toolchain 支持:
