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* GPS: 2.7 ~ 3.6V, BDS/GPS 双模连续运行:<23mA(@3.3V), 待机 <10uA(@3.3V)
 
* GPS: 2.7 ~ 3.6V, BDS/GPS 双模连续运行:<23mA(@3.3V), 待机 <10uA(@3.3V)
 
* SX1278: 1.8 ~ 3.7V (17dBm), 2.4 ~ 3.7V (20dBm)
 
* SX1278: 1.8 ~ 3.7V (17dBm), 2.4 ~ 3.7V (20dBm)
* EFM32ZG: 1.98 ~ 3.8V
+
* EFM32ZG: 1.98 ~ 3.8V,deep sleep < 1uA
 +
* ATmega328p: 1.8 ~ 5.5V, deep sleep <  4.3uA
 
* [http://wiki.jackslab.org/Power AP2112]: Max 6.5V input, Low Quiescent Current: 55μA (Typ.), Low Standby Current: 0.01μA (Typ.)  
 
* [http://wiki.jackslab.org/Power AP2112]: Max 6.5V input, Low Quiescent Current: 55μA (Typ.), Low Standby Current: 0.01μA (Typ.)  
  

2019年11月7日 (四) 09:43的最后版本

目录

[编辑] 1 Notes

  • U, Voltage, 0x00
  • T, Temperature, 0x01
  • H, Humidy, 0x02
  • L, Light, 0x03
  • P, Pressure, 0x04
  • Q, Flow Rate, 0x05
  • V, Velocity, 0x06


  • W, Water, 0x07
  • D, Door, 0x08


  • CH4, CH4, 0x10
  • CO2, CO2, 0x11
  • G, GPS, 0x20





[编辑] 2 Key Concepts

[编辑] 2.1 Spreading Factor

Sx1278-spreading-factor.png


Note:

The Spreading Factor must be known in advance on both transmit and receive sides of the link as different spreading factors are orthogonal to each other


Spreading Factor 6:

  • Set Spreading Factor = 6 in Reg_ModemConfig2
  • The head must be set to Implicit mode (Reg_ModemConfig1[0] := 1)
  • Set the DetectionOptimize of Reg_LoRaDetectOptimize to value '0b101'
  • Write 0x0C in the RegDetectionThreshold


void sx1278_set_spread_fact(uint8_t factor)
{
    uint8_t d;
    d = sx1278_read_reg(REG_MODEMCONFIG2);
    d = (d & MODEMCONFIG2_SF_MASK) | (factor << 4);
    sx1278_write_reg(REG_MODEMCONFIG2, d);

    if (factor == 6) {
        sx1278_write_reg(REG_DETECTIONOPTIMIZE, 0x5);                                       
        sx1278_write_reg(REG_DETECTIONTHRESHOLD, 0xC);                                      
    } else {
        sx1278_write_reg(REG_DETECTIONOPTIMIZE, 0x3);
        sx1278_write_reg(REG_DETECTIONTHRESHOLD, 0xA);                                      
    }
}

/* Reg_ModemConfig1[0] */
void sx1278_set_head_on(bool enable)
{
    uint8_t rxd;
    rxd = sx1278_read_reg(REG_MODEMCONFIG1);
    rxd = (rxd & MODEMCONFIG1_IMPLICITHEADER_MASK) | (enable);
    sx1278_write_reg(REG_MODEMCONFIG1, rxd);
}


[编辑] 2.2 Signal Bandwidth

Sx1278-signal-bandwidth.png


  • Reg_ModemConfig[7:4]
  • In the lower band (169MHz), signal bandwidths 8 & 9 are not supported


Note:

The Spreading Factor must be known in advance on both transmit and receive sides of the link


/*
 * Lora band width 
 *   0: 7.8 kHz, 1: 10.4 kHz, 2: 15.6 kHz, 3: 20.8 kHz,
 *   4: 31.2 kHz,5: 41.6 kHz, 6: 62.5 kHz, 7: 125 kHz,
 *   8: 250 kHz, 9: 500 kHz, other: Reserved
*/
void sx1278_set_bandwidth(uint8_t bw)
{
    uint8_t d;
    d = sx1278_read_reg(REG_MODEMCONFIG1);
    d = (d & MODEMCONFIG1_BW_MASK) | (bw << 4);
    sx1278_write_reg(REG_MODEMCONFIG1, d);
}


[编辑] 2.3 Coding Rate

Sx1278-coding-rate.png


  • Reg_ModemConfig[3:1]
  • 1 --- > 4/5
  • 2 ---> 4/6
  • 3 ---> 4/7
  • 4 ---> 4/8


 /*
  * Lora Error Coding:
  *
  *   1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8
 */
void sx1278_set_error_coding(uint8_t value)
{   
    uint8_t d;
    d = sx1278_read_reg(REG_MODEMCONFIG1);
    d = (d & MODEMCONFIG1_CODINGRATE_MASK) | (value << 1);
    sx1278_write_reg(REG_MODEMCONFIG1, d);
}

/* Reg_ModemConfig2[2] */
void sx1278_set_crc_on(bool enable)
{
    uint8_t d;
    d = sx1278_read_reg(REG_MODEMCONFIG2);
    d = (d & MODEMCONFIG2_RXPAYLOADCRC_MASK) | (enable << 2);
    sx1278_write_reg(REG_MODEMCONFIG2, d);
}



[编辑] 3 LoRaWAN Settings

[编辑] 3.1 Uplink TX

LoRaWAN-uplink-settins.png

void sx1278_lora_wan()
{
    sx1278_set_opmode(STANDBY);
    sx1278_set_rfmode(LORA);

    sx1278_write_reg(REG_PARAMP, 0x08);       // set 50us PA ramp-up time

    #define FREQ_STEP   61.03515625
    /*
     * freq = (uint32_t)((double)434000000 / (double)FREQ_STEP)
     *      = 7094272 = 0x6C8000             // 434.0MHz
     *
     *  const uint32_t CH_00_433 = 0x6C5333; // 433.3MHz
     *  const uint32_t CH_01_433 = 0x6C6666; // 433.6MHz
     *  const uint32_t CH_02_433 = 0x6C7999; // 433.9MHz
     *  const uint32_t CH_03_433 = 0x6C9333; // 434.3MHz
     */
    sx1278_write_reg(REG_FRFMSB, 0x6C);
    sx1278_write_reg(REG_FRFMID, 0x93);
    sx1278_write_reg(REG_FRFLSB, 0x33);

    sx1278_write_reg(REG_MODEMCONFIG1, 0x72);       // 125KHz, 4/5, Explicit Header
    sx1278_write_reg(REG_MODEMCONFIG2, 0xC4);       // SF=12, TxContin single pkt, crc on, RX timeout msb -> 0x0
    sx1278_write_reg(REG_MODEMCONFIG3, 0x0C);       // low data rate optimization

    sx1278_write_reg(REG_SYNCWORD, 0x34);

    sx1278_write_reg(REG_OCP, 0x20 | 0x1B);   // 240mA
    sx1278_write_reg(REG_PACONFIG, 0x8F);   // select PA_BOOST pin, Output power is limited to +20 dBm (100mW)
}



[编辑] 3.2 BaseStation RX

LoRaWAN-downlink-settings.png


  • Reg_LNA = 0x23

http://www.semtech.com/images/datasheet/SX1272_settings_for_LoRaWAN_v2.0.pdf



[编辑] 4 TX

  • Static configuration registers can only be accessed in Sleep, Standby or FSTX mode
  • The LoRa FIFO can only be filled in Standby mode
  • Data TX is initiated by sending TX mode request
  • Upon completion the TxDone interrupt is issued and the radio returns to Standby mode
  • Following transmission the radio can be manually placed in Sleep mode or the FIFO refilled for subsequent TX operation


LoRa TX data FIFO filling:

  • Set Reg_FifoAddrPtr to Reg_FifoTxBaseAddr
  • Write PayloadLength bytes to the FIFO (Reg_Fifo)


Reg_Fifo 是 FIFO 的统一读写口,SPI 读写 Reg_Fifo,就会去 FIFO 内部地址为 Reg_FifoAddrPtr 的位置取放数据

TX_Modem 直接去 FIFO 地址为 Reg_FifoTxBaseAddr 的位置,取 PayloadLength 字节的数据



[编辑] 5 TX Power

1. Set Reg_PaConfig[7:7] to select PA output pin

  • 0 to select RFO pin, Output power is limited to +14 dBm (25mW)
  • 1 to select PA_BOOST pin, Output power is limited to +20 dBm (100mW)


2. Set Reg_PaConfig[6:4] to select max output power

  • Pmax = 10.8 + 0.6 * MaxPower [dBm], valide when user select the RFO pin as the output


3. Set Reg_PaConfig[3:0] to select OutputPower

  • Pout = Pmax - (15 - OutputPower) if PaSelect = 1 (RFO pin)
  • Pout = 17 - (15 - OutputPower) if PaSelect = 1 (PA_BOOST pin)


void sx1278_set_rf_maxpower()
{
    sx1278_write_reg(REG_PACONFIG, 0x8F);
}



[编辑] 6 Schematics

[编辑] 6.1 inair4

Sx1276-sch.png

http://modtronix.com/prod/imod/inair4/inair4_r1_sch.pdf



[编辑] 6.2 Official

[编辑] 6.2.1 Combined RFI and RFO, switchless (Ref design only)

Sx1272-ref-combi-rxtx-switchless.png


[编辑] 6.2.2 Combined RFI and RFO design

Sx1272-ref-combi-rxtx.png


[编辑] 6.2.3 Combined RFI and PA_BOOST design

Sx1272-ref-combi-rxpaboost.png


Sx1272-bom.png



[编辑] 7 MCU Spec

LoRaWAN-MCU-spec.png



[编辑] 8 Chip

SX1276-77-78-79 .png


[编辑] 8.1 Band

  • Band 1 (HF): 862 (*779) - 1020 (*960) MHz ---> SX1276/77/79
  • Band 2 (LF): 410 - 525 (*480) MHz ---> SX1276/77/78/79
  • Band 3 (LF): 137 - 175 (*160) MHz ---> SX1276/77/78/79


SX1279:

  • Band 1: 779 - 960 MHz
  • Band 2: 410 - 480 MHz
  • Band 3: 137 - 160 MHz

SX1278:

  • Band 2 (LF): 410 - 525 MHz
  • Band 3 (LF): 137 - 175 MHz

SX1276:

  • Band 1 (HF): 862 - 1020 MHz
  • Band 2 (LF): 410 - 525 MHz
  • Band 3 (LF): 137 - 175 MHz


[编辑] 8.2 SX1278

  • Low RX current of 9.9 mA, 200 nA register retention
  • 168 dB maximum link budget
  • +20 dBm - 100 mW constant RF output vs. V supply
  • +14 dBm high efficiency PA
  • Programmable bit rate up to 300 kbps
  • High sensitivity: down to -148 dBm
  • Power Supply: 1.8 ~ 3.7V (17dBm), 2.4 ~ 3.7V (20dBm)




[编辑] 8.3 SX1301

The SX1301 digital baseband chip is a massive digital signal processing engine specifically designed to offer breakthrough gateway capabilities in the ISM bands worldwide. It integrates the LORA concentrator IP.

Sx1301-bd.gif


  • Up to -142 dBm sensitivity with SX1257 or SX1255 Tx/Rx front-end
  • -139.5 dBm with included ref design
  • 70 dB CW interferer rejection at c1 MHz offset
  • Able to operate with negative SNR
  • CCR up to 9 dB
  • Emulates 49x LoRa demodulators and 1x (G)FSK demodulator
  • Dual digital Tx & Rx radio front-end interfaces
  • 10 programmable parallel demodulation paths
  • Dynamic data-rate adaptation (ADR)
  • True antenna diversity or simultaneous dual-band operation


SX1301 Datasheet



[编辑] 8.4 SX126x

  • SX1262: (+22dBm), 150-960 MHz (e.g. 430/490MHz, 868/915MHz), Rx Current 4.6mA, QFN 4x4mm
  • SX1261: (+15dBm), 150-960 MHz (e.g. 430/490MHz, 868/915MHz), Rx Current 4.6mA, QFN 4x4mm
  • SX1268: (+22dBm), 410-810 MHz, Rx Current 4.6mA, QFN 4x4mm


  • 4.2 mA of active receive current consumption
  • 25 mA TX @ 14dbm
  • Programmable bit rate up to 62.5 kbps LoRa and 300 kbps FSK
  • High sensitivity: down to -148 dBm




[编辑] 8.5 Sensors

  • MCP3421: 2.7V ~ 5.5V, 145 uA (Continuous Conversion) or 39 uA (One-Shot Conversion with 1 SPS)
  • SHT3x: 2.15 ~ 5.5 V, 4.8µW (at 2.4 V, low repeatability, 1 measurement / s) ADDR: 0x44(LOW)/0x45(HIGH)


  • SHT2x: 2.1 ~ 3.6 V, 3.2µW (at 8 bit, 1 measurement / s, ADDR: 0x40)
  • TSL2561: 2.7 ~ 3.6V, 0.75 mW Typical, ADDR: 0x29(LOW)/0x39(FLOAT)/0x49(HIGH)
  • BH1750: 2.4 - 3.6V, 120uA, powerdown current 1uA, ADDR: 0x5C(HIGH) / 0x23(LOW)
  • BMP180: 1.8~3.6V, 5µA at 1 sample / sec. in standard mode, ADDR: 0x77
  • BMP085: 1.8~3.6V, 5µA at 1 sample / sec. in standard mode, ADDR: 0x77
  • BME280, Addr: 0x76 (SDO Low) / 0x77 (SDO High)
  • MAX44009, Addr: 0x96/0x97 (A0 High), 0x94/0x95 (A0 Low)


  • GPS: 2.7 ~ 3.6V, BDS/GPS 双模连续运行:<23mA(@3.3V), 待机 <10uA(@3.3V)
  • SX1278: 1.8 ~ 3.7V (17dBm), 2.4 ~ 3.7V (20dBm)
  • EFM32ZG: 1.98 ~ 3.8V,deep sleep < 1uA
  • ATmega328p: 1.8 ~ 5.5V, deep sleep < 4.3uA
  • AP2112: Max 6.5V input, Low Quiescent Current: 55μA (Typ.), Low Standby Current: 0.01μA (Typ.)



[编辑] 9 Reference









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